| Design flow of accelerating hybrid extremely low bit-width neural network in embedded FPGA J Wang, Q Lou, X Zhang, C Zhu, Y Lin, D Chen 2018 28th international conference on field programmable logic and …, 2018 | 128 | 2018 |
| Device-circuit-architecture co-exploration for computing-in-memory neural accelerators W Jiang, Q Lou, Z Yan, L Yang, J Hu, XS Hu, Y Shi IEEE Transactions on Computers 70 (4), 595-605, 2020 | 83 | 2020 |
| A mixed signal architecture for convolutional neural networks Q Lou, C Pan, J McGuinness, A Horvath, A Naeemi, M Niemier, XS Hu ACM Journal on Emerging Technologies in Computing Systems (JETC) 15 (2), 1-26, 2019 | 29 | 2019 |
| Cellular neural network friendly convolutional neural networks—CNNs with CNNs A Horváth, M Hillmer, Q Lou, XS Hu, M Niemier Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 28 | 2017 |
| Embedding error correction into crossbars for reliable matrix vector multiplication using emerging devices Q Lou, T Gao, P Faley, M Niemier, XS Hu, S Joshi Proceedings of the ACM/IEEE International Symposium on Low Power Electronics …, 2020 | 17 | 2020 |
| Transland: An adversarial transfer learning approach for migratable urban land usage classification using remote sensing Y Zhang, R Zong, J Han, H Zheng, Q Lou, D Zhang, D Wang 2019 ieee international conference on big data (big data), 1567-1576, 2019 | 17 | 2019 |
| Hardware design and the competency awareness of a neural network Y Ding, W Jiang, Q Lou, J Liu, J Xiong, XS Hu, X Xu, Y Shi Nature Electronics 3 (9), 514-523, 2020 | 14 | 2020 |
| TFET-based operational transconductance amplifier design for CNN systems Q Lou, I Palit, A Horvath, XS Hu, M Niemier, J Nahas Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 277-282, 2015 | 13 | 2015 |
| A uniform modeling methodology for benchmarking dnn accelerators I Palit, Q Lou, R Perricone, M Niemier, XS Hu 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2019 | 11 | 2019 |
| Application-driven design exploration for dense ferroelectric embedded non-volatile memories MM Sharifi, L Pentecost, R Rajaei, A Kazemi, Q Lou, GY Wei, D Brooks, ... 2021 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2021 | 10 | 2021 |
| Energy-efficient convolutional neural network based on cellular neural network using beyond-CMOS technologies C Pan, Q Lou, M Niemier, S Hu, A Naeemi IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019 | 8 | 2019 |
| Nonvolatile spintronic memory cells for neural networks AW Stephan, Q Lou, MT Niemier, XS Hu, SJ Koester IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019 | 7 | 2019 |
| Cellular neural networks for image analysis using steep slope devices I Palit, Q Lou, M Niemier, B Sedighi, J Nahas, XS Hu 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 92-95, 2014 | 7 | 2014 |
| Analytically modeling power and performance of a CNN system I Palit, Q Lou, N Acampora, J Nahas, M Niemier, XS Hu 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 186-193, 2015 | 6 | 2015 |
| Analytical Models for Calculating Power and Performance of a CNN System I Palit, B Sedighi, Q Lou, M Niemier, J Nahas, XS Hu unpublished, 0 | 2 | |
| A hybrid optical-electrical analog deep learning accelerator using incoherent optical signals M Yang, Q Lou, R Rajaei, MR Jokar, J Qiu, Y Liu, A Udupa, FT Chong, ... ACM Journal on Emerging Technologies in Computing Systems 19 (2), 1-24, 2023 | 1 | 2023 |
| Super efficient neural network for compression artifacts reduction and super resolution W Ma, Q Lou, A Kazemi, J Faraone, T Afzal Proceedings of the IEEE/CVF Winter Conference on Applications of Computer …, 2024 | | 2024 |
| Cross-Layer Energy Efficient Hardware Design and Benchmarking With CMOS and Emerging Technologies Q Lou University of Notre Dame, 2020 | | 2020 |
| Application-level Studies of Cellular Neural Network-based Hardware Accelerators Q Lou, I Palit, T Li, A Horvath, M Niemier, XS Hu arXiv preprint arXiv:1903.06649, 2019 | | 2019 |
| Simulation Framework and Hardware-in-the-Loop Validation for Analog Compute Accelerators J Weiss, G Olmschenk, Q Lou, F Horst, BJ Offrein Congnitive Computing, 2018, 2018 | | 2018 |
Xiaobo Sharon HuUniversity of Notre Dame, Department of Computer Science and EngineeringVerified email at nd.edu
