Software-enforced interconnect arbitration for COTS multicores M Ziccardi, A Cornaglia, E Mezzetti, T Vardanega OPEN ACCESS SERIES IN INFORMATICS 47, 11-20, 2015 | 8 | 2015 |
Ontology-supported design parameter management for change impact analysis J Novacek, A Ahari, A Cornaglia, F Haxel, A Viehl, O Bringmann, ... 2018 44th Euromicro Conference on Software Engineering and Advanced …, 2018 | 5 | 2018 |
JIT-based context-sensitive timing simulation for efficient platform exploration A Cornaglia, MS Hasan, A Viehl, O Bringmann, W Rosenstiel 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 369-374, 2020 | 3 | 2020 |
Modeltime: Fully automated timing exploration of simulink models for embedded processors A Cornaglia, S Hasan, A Viehl, O Bringmann, W Rosenstiel AmE 2019-Automotive meets Electronics; 10th GMM-Symposium, 1-6, 2019 | 2 | 2019 |
Simultime: Context-sensitive timing simulation on intermediate code representation for rapid platform explorations A Cornaglia, A Viehl, O Bringmann, W Rosenstiel Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 2 | 2019 |
D3. 1: Identification of relevant state of the art J Martinez, A Parsai Tech. rep., ITEA 3 ReVAMP2 Project Consortium, 2018 | 1 | 2018 |
Accurate LLVM IR to Binary CFGs Mapping for Simulation of Optimized Embedded Software A Cornaglia, A Viehl, O Bringmann International Conference on Embedded Computer Systems, 3-15, 2021 | | 2021 |