| A survey of power estimation techniques in VLSI circuits FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2 (4), 446-455, 1994 | 960 | 1994 |
| Transition density: A new measure of activity in digital circuits FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1993 | 541 | 1993 |
| A Monte Carlo approach for power estimation R Burch, FN Najm, P Yang, TN Trick IEEE Transactions on Very Large Scale Integration (VLSI) Systems 1 (1), 63-71, 1993 | 480 | 1993 |
| A gate-level leakage power reduction method for ultra-low-power CMOS circuits JP Halter, FN Najm Proceedings of CICC 97-Custom Integrated Circuits Conference, 475-478, 1997 | 377 | 1997 |
| A multigrid-like technique for power grid analysis JN Kozhaya, SR Nassif, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 319 | 2002 |
| Transition density, a stochastic measure of activity in digital circuits FN Najm Proceedings of the 28th ACM/IEEE Design Automation Conference, 644-649, 1991 | 312 | 1991 |
| Low-leakage asymmetric-cell SRAM N Azizi, FN Najm, A Moshovos IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (4), 701-715, 2003 | 256 | 2003 |
| Power macromodeling for high level power estimation S Gupta, FN Najm Proceedings of the 34th annual Design Automation Conference, 365-370, 1997 | 243 | 1997 |
| Probabilistic simulation for reliability analysis of CMOS VLSI circuits FN Najm, R Burch, P Yang, IN Hajj IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990 | 242 | 1990 |
| Statistical estimation of the switching activity in digital circuitsy MG Xakellis, FN Najm 31st Design Automation Conference, 728-733, 1994 | 235 | 1994 |
| Circuit simulation FN Najm, RC Dumas Wiley, 2010 | 231 | 2010 |
| Active leakage power optimization for FPGAs JH Anderson, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 219 | 2006 |
| Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution H Kriplani, FN Najm, IN Hajj IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1995 | 197 | 1995 |
| Towards a high-level power estimation capability [digital ICs] M Nemani, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 192 | 1996 |
| Power modeling for high-level power estimation S Gupta, FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 18-29, 2000 | 173 | 2000 |
| Power estimation techniques for FPGAs JH Anderson, FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (10 …, 2004 | 148 | 2004 |
| High-level area and power estimation for VLSI circuits M Nemani, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 143 | 1999 |
| Power Estimation in Sequential Circuitsy SGFN Najm 32nd Design Automation Conference, 635-640, 1995 | 123 | 1995 |
| A static pattern-independent technique for power grid voltage integrity verification D Kouroussis, FN Najm Proceedings of the 40th annual Design Automation Conference, 99-104, 2003 | 107 | 2003 |
| McPOWER: A Monte Carlo approach to power estimation R Burch, F Najm, P Yang, T Trick ICCAD 92, 90-97, 1992 | 97 | 1992 |
