Farid N. Najm
Farid N. Najm
Professor of Electrical & Computer Engineering, University of Toronto
Verified email at utoronto.ca
Title
Cited by
Cited by
Year
A survey of power estimation techniques in VLSI circuits
FN Najm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2 (4), 446-455, 1994
9601994
Transition density: A new measure of activity in digital circuits
FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1993
5411993
A Monte Carlo approach for power estimation
R Burch, FN Najm, P Yang, TN Trick
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 1 (1), 63-71, 1993
4801993
A gate-level leakage power reduction method for ultra-low-power CMOS circuits
JP Halter, FN Najm
Proceedings of CICC 97-Custom Integrated Circuits Conference, 475-478, 1997
3771997
A multigrid-like technique for power grid analysis
JN Kozhaya, SR Nassif, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
3192002
Transition density, a stochastic measure of activity in digital circuits
FN Najm
Proceedings of the 28th ACM/IEEE Design Automation Conference, 644-649, 1991
3121991
Low-leakage asymmetric-cell SRAM
N Azizi, FN Najm, A Moshovos
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (4), 701-715, 2003
2562003
Power macromodeling for high level power estimation
S Gupta, FN Najm
Proceedings of the 34th annual Design Automation Conference, 365-370, 1997
2431997
Probabilistic simulation for reliability analysis of CMOS VLSI circuits
FN Najm, R Burch, P Yang, IN Hajj
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990
2421990
Statistical estimation of the switching activity in digital circuitsy
MG Xakellis, FN Najm
31st Design Automation Conference, 728-733, 1994
2351994
Circuit simulation
FN Najm, RC Dumas
Wiley, 2010
2312010
Active leakage power optimization for FPGAs
JH Anderson, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
2192006
Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution
H Kriplani, FN Najm, IN Hajj
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1995
1971995
Towards a high-level power estimation capability [digital ICs]
M Nemani, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996
1921996
Power modeling for high-level power estimation
S Gupta, FN Najm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 18-29, 2000
1732000
Power estimation techniques for FPGAs
JH Anderson, FN Najm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (10 …, 2004
1482004
High-level area and power estimation for VLSI circuits
M Nemani, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999
1431999
Power Estimation in Sequential Circuitsy
SGFN Najm
32nd Design Automation Conference, 635-640, 1995
1231995
A static pattern-independent technique for power grid voltage integrity verification
D Kouroussis, FN Najm
Proceedings of the 40th annual Design Automation Conference, 99-104, 2003
1072003
McPOWER: A Monte Carlo approach to power estimation
R Burch, F Najm, P Yang, T Trick
ICCAD 92, 90-97, 1992
971992
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