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Trey Reece
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Neutron-and proton-induced single event upsets for D-and DICE-flip/flop designs at a 40 nm technology node
TD Loveless, S Jagannathan, T Reece, J Chetia, BL Bhuva, MW McCurdy, ...
Nuclear Science, IEEE Transactions on 58 (3), 1008-1014, 2011
1742011
On-chip measurement of single-event transients in a 45 nm silicon-on-insulator technology
TD Loveless, JS Kauppila, S Jagannathan, DR Ball, JD Rowe, ...
Nuclear Science, IEEE Transactions on 59 (6), 2748-2755, 2012
572012
Technology scaling comparison of flip-flop heavy-ion single-event upset cross sections
NJ Gaspard, S Jagannathan, ZJ Diggins, MP King, SJ Wen, R Wong, ...
Nuclear Science, IEEE Transactions on 60 (6), 4368-4373, 2013
542013
Analysis of data-leak hardware Trojans in AES cryptographic circuits
T Reece, WH Robinson
Technologies for Homeland Security (HST), 2013 IEEE International Conference …, 2013
392013
Design comparison to identify malicious hardware in external intellectual property
T Reece, DB Limbrick, WH Robinson
Trust, Security and Privacy in Computing and Communications (TrustCom), 2011 …, 2011
292011
Stealth assessment of hardware Trojans in a microcontroller
T Reece, DB Limbrick, X Wang, BT Kiddie, WH Robinson
Computer Design (ICCD), 2012 IEEE 30th International Conference on, 139-142, 2012
222012
Detection of Hardware Trojans in Third-Party Intellectual Property using Untrusted Modules
T Reece, W Robinson
IEEE, 0
22
Hardware Trojans: The defense and attack of integrated circuits
T Reece, WH Robinson
Computer Design (ICCD), 2011 IEEE 29th International Conference on, 293-296, 2011
112011
Hardware Trojans: The defense and attack of integrated circuits
T Reece, WH Robinson
Computer Design (ICCD), 2011 IEEE 29th International Conference on, 293-296, 2011
112011
Angled flip-flop single-event cross sections for submicron bulk CMOS technologies
N Gaspard, S Jagannathan, Z Diggins, T Reece, SJ Wen, R Wong, K Lilja, ...
Radiation and Its Effects on Components and Systems (RADECS), 2013 14th …, 2013
92013
Scalability of Capacitive Hardening for Flip-Flops in Advanced Technology Nodes
ZJ Diggins, NJ Gaspard, NN Mahatme, S Jagannathan, TD Loveless, ...
Nuclear Science, IEEE Transactions on 60 (6), 4394-4398, 2013
82013
Timing analysis in software and hardware to implement NIST elliptic curves over prime fields
Q Ding, T Reece, WH Robinson
Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest …, 2013
42013
Assessing and Detecting Malicious Hardware in Integrated Circuits
T Reece
Vanderbilt University, 2014
32014
Addressing the Challenges of Hardware Assurance in Reconfigurable Systems
WH Robinson, T Reece, NN Mahatme
Proceedings of the International Conference on Engineering of Reconfigurable …, 2013
32013
Addressing the Challenges of Hardware Assurance in Reconfigurable Systems
WH Robinson, T Reece, NN Mahatme
Proceedings of the International Conference on Engineering of Reconfigurable …, 2013
32013
Identification of Trojans in an FPGA using low-precision equipment
T Reece, BT Kiddie, WH Robinson
Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest …, 2014
12014
RISK-AVERSION IN LABORATORY LEARNING
T Reece, WH Robinson
ICERI2013 Proceedings, 6879-6886, 2013
12013
Detection of Malicious Hardware in ASICs and FPGAs
T Reece
12009
Detection of Malicious Hardware in Integrated Circuits and Field Programmable Gate Arrays
T Reece
Vanderbilt University, 2009
12009
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