| Area-efficient FPGA implementations of the SHA-3 finalists B Jungk, J Apfelbeck 2011 International Conference on Reconfigurable Computing and FPGAs, 235-241, 2011 | 77 | 2011 |
| Evaluation of compact FPGA implementations for all SHA-3 finalists B Jungk The Third SHA-3 Candidate Conference, 2012 | 30 | 2012 |
| Among slow dwarfs and fast giants: A systematic design space exploration of KECCAK B Jungk, M Stöttinger 2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013 | 22 | 2013 |
| XMSS and embedded systems W Wang, B Jungk, J Wälde, S Deng, N Gupta, J Szefer, R Niederhagen International Conference on Selected Areas in Cryptography, 523-550, 2019 | 21 | 2019 |
| On FPGA-based implementations of Gröstl. B Jungk, S Reith IACR Cryptol. ePrint Arch. 2010, 260, 2010 | 21 | 2010 |
| Compact implementations of Grøstl, JH and Skein for FPGAs B Jungk Proceedings of the ECRYPT II Hash Workshop, 2011 | 18 | 2011 |
| On Optimized FPGA Implementations of the SHA-3 Candidate Groestl. B Jungk, S Reith, J Apfelbeck IACR Cryptol. ePrint Arch. 2009, 206, 2009 | 18 | 2009 |
| A systematic study of lightweight hash functions on FPGAs B Jungk, LR Lima, M Hiller 2014 International Conference on ReConFigurable Computing and FPGAs …, 2014 | 14 | 2014 |
| Side-channel resistant AES architecture utilizing randomized composite field representations B Jungk, M Stöttinger, J Gampe, S Reith, SA Huss 2012 International Conference on Field-Programmable Technology, 125-128, 2012 | 11 | 2012 |
| On FPGA-based implementations of the SHA-3 candidate Grøstl B Jungk, S Reith 2010 International Conference on Reconfigurable Computing and FPGAs, 316-321, 2010 | 11 | 2010 |
| Parameterized hardware accelerators for lattice-based cryptography and their application to the hw/sw co-design of qtesla W Wang, S Tian, B Jungk, N Bindel, P Longa, J Szefer IACR Transactions on Cryptographic Hardware and Embedded Systems, 269-306, 2020 | 9 | 2020 |
| Don't fall into a trap: Physical side-channel analysis of chacha20-poly1305 B Jungk, S Bhasin Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 9 | 2017 |
| Hobbit—Smaller but faster than a dwarf: Revisiting lightweight SHA-3 FPGA implementations B Jungk, M Stöttinger 2016 International Conference on ReConFigurable Computing and FPGAs …, 2016 | 9 | 2016 |
| FPGA-based evaluation of cryptographic algorithms B Jungk Goethe University Frankfurt am Main, 2016 | 9 | 2016 |
| Efficient side-channel protections of ARX ciphers B Jungk, R Petri, M Stöttinger IACR Transactions on Cryptographic Hardware and Embedded Systems, 627-653, 2018 | 8 | 2018 |
| There goes your PIN: exploiting smartphone sensor fusion under single and cross user setting D Berend, S Bhasin, B Jungk Proceedings of the 13th International Conference on Availability …, 2018 | 4 | 2018 |
| Shrinking KECCAK hardware implementations B Jungk, M Stottinger, M Harter SHA-3 Workshop 2014. National Institute of Standards and Technology (NIST), 2014 | 4 | 2014 |
| On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers Z Najm, D Jap, B Jungk, S Picek, S Bhasin 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 552-555, 2018 | 3 | 2018 |
| On a FPGA-based method for authentication using Edwards curves A Himmighofen, B Jungk, S Reith 2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013 | 3 | 2013 |
| Serialized lightweight SHA-3 FPGA implementations B Jungk, M Stöttinger Microprocessors and Microsystems 71, 102857, 2019 | 2 | 2019 |
Marc StöttingerContinental AGBestätigte E-Mail-Adresse bei continental.com
