| Computer Architecture and Organization JP Hayes McGraw-Hill, 1978 | 1083* | 1978 |
| Unveiling the ISCAS-85 benchmarks: A case study in reverse engineering MC Hansen, H Yalcin, JP Hayes IEEE Design & Test of Computers 16 (3), 72-80, 1999 | 682 | 1999 |
| Synthesis of reversible logic circuits VV Shende, AK Prasad, IL Markov, JP Hayes IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003 | 638 | 2003 |
| Survey of stochastic computing A Alaghi, JP Hayes ACM Transactions on Embedded computing systems (TECS) 12 (2s), 1-19, 2013 | 633 | 2013 |
| A survey of the theory of hypercube graphs F Harary, JP Hayes, HJ Wu Computers & Mathematics with Applications 15 (4), 277-289, 1988 | 465 | 1988 |
| A graph model for fault-tolerant computing systems Hayes IEEE Transactions on computers 100 (9), 875-884, 1976 | 425 | 1976 |
| Accurate reliability evaluation and enhancement via probabilistic transfer matrices S Krishnaswamy, GF Viamontes, IL Markov, JP Hayes Design, Automation and Test in Europe, 282-287, 2005 | 376 | 2005 |
| Architecture of a Hypercube Supercomputer. JP Hayes, TN Mudge, QF Stout, S Colley, J Palmer ICPP, 653-660, 1986 | 317 | 1986 |
| Stochastic circuits for real-time image-processing applications A Alaghi, C Li, JP Hayes Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 302 | 2013 |
| Hierarchical test generation using precomputed tests for modules BT Murray, JP Hayes IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990 | 286 | 1990 |
| A microprocessor-based hypercube supercomputer JP Hayes, T Mudge, QF Stout, S Colley, J Palmer IEEE micro 6 (5), 6-17, 1986 | 280 | 1986 |
| Fault testing for reversible circuits KN Patel, JP Hayes, IL Markov IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004 | 234 | 2004 |
| Hypercube supercomputers JP Hayes, T Mudge Proceedings of the IEEE 77 (12), 1829-1841, 1989 | 228 | 1989 |
| A fault-tolerant communication scheme for hypercube computers TC Lee, JP Hayes IEEE Transactions on Computers 41 (10), 1242-1256, 1992 | 225 | 1992 |
| The promise and challenge of stochastic computing A Alaghi, W Qian, JP Hayes IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 219 | 2017 |
| Introduction to digital logic design BNOT Gate, GN Gate, UILIO Upper, OR Gate, NOR Gate, XOR Gate, ... | 218 | 1993 |
| Reversible logic circuit synthesis VV Shende, AK Prasad, IL Markov, JP Hayes Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002 | 215 | 2002 |
| Low-cost on-line fault detection using control flow assertions R Venkatasubramanian, JP Hayes, BT Murray 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003., 137-143, 2003 | 201 | 2003 |
| A Fully Integrated Auto-Calibrated Super-Regenerative Receiver in 0.13-CMOS JY Chen, MP Flynn, JP Hayes IEEE Journal of Solid-State Circuits 42 (9), 1976-1985, 2007 | 193 | 2007 |
| Exploiting correlation in stochastic circuit design A Alaghi, JP Hayes 2013 IEEE 31st International Conference on Computer Design (ICCD), 39-46, 2013 | 187 | 2013 |
Igor L. MarkovMeta, University of MichiganVerified email at fb.com
