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Eric Karl
Eric Karl
Intel Fellow, Director of Embedded Memory Technology and Circuits
Verified email at intel.com
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Cited by
Cited by
Year
A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 Ám2 SRAM cell size
S Natarajan, M Agostinelli, S Akbar, M Bost, A Bowonder, V Chikarmane, ...
2014 IEEE International Electron Devices Meeting, 3.7. 1-3.7. 3, 2014
6302014
A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 Ám2SRAM cell size
S Natarajan, M Agostinelli, S Akbar, M Bost, A Bowonder, V Chikarmane, ...
2014 IEEE International Electron Devices Meeting, 3.7. 1-3.7. 3, 2014
6302014
A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active VMIN-enhancing assist circuitry
E Karl, Y Wang, YG Ng, Z Guo, F Hamzaoglu, U Bhattacharya, K Zhang, ...
2012 IEEE International Solid-State Circuits Conference, 230-232, 2012
2142012
Elastic: An adaptive self-healing architecture for unpredictable silicon
D Sylvester, D Blaauw, E Karl
IEEE Design & Test of Computers 23 (6), 484-490, 2006
1452006
Compact in-situ sensors for monitoring negative-bias-temperature-instability effect and oxide degradation
E Karl, P Singh, D Blaauw, D Sylvester
2008 IEEE International Solid-State Circuits Conference-Digest of Technicalá…, 2008
1442008
A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation
H Nho, P Kolar, F Hamzaoglu, Y Wang, E Karl, YG Ng, U Bhattacharya, ...
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010á…, 2010
94*2010
Reliability modeling and management in dynamic microprocessor-based systems
E Karl, D Blaauw, D Sylvester, T Mudge
Proceedings of the 43rd annual Design Automation Conference, 1057-1060, 2006
902006
A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized forá…
CH Jan, F Al-Amoody, HY Chang, T Chang, YW Chen, N Dias, W Hafez, ...
2015 Symposium on VLSI Technology (VLSI Technology), T12-T13, 2015
892015
Multi-mechanism reliability modeling and management in dynamic systems
E Karl, D Blaauw, D Sylvester, T Mudge
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (4), 476-487, 2008
712008
A 4.6 GHz 162 Mb SRAM design in 22 nm tri-gate CMOS technology with integrated read and write assist circuitry
E Karl, Y Wang, YG Ng, Z Guo, F Hamzaoglu, M Meterelliyoz, J Keane, ...
IEEE Journal of Solid-State Circuits 48 (1), 150-158, 2012
672012
Dynamic nbti management using a 45 nm multi-degradation sensor
P Singh, E Karl, D Sylvester, D Blaauw
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (9), 2026-2037, 2011
662011
22FFL: A high performance and ultra low power FinFET technology for mobile and RF applications
B Sell, B Bigwood, S Cha, Z Chen, P Dhage, P Fan, M Giraud-Carrier, ...
2017 IEEE International Electron Devices Meeting (IEDM), 29.4. 1-29.4. 4, 2017
652017
A 0.6V 1.5 GHz 84Mb SRAM design in 14nm FinFET CMOS technology
E Karl, Z Guo, JW Conary, JL Miller, YG Ng, S Nalam, D Kim, J Keane, ...
Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, 1-3, 2015
58*2015
Compact degradation sensors for monitoring NBTI and oxide degradation
P Singh, E Karl, D Blaauw, D Sylvester
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (9á…, 2011
562011
A 23.6-Mb/mm▓ SRAM in 10-nm FinFET Technology With Pulsed-pMOS TVC and Stepped-WL for Low-Voltage Applications
Z Guo, D Kim, S Nalam, J Wiedemer, X Wang, E Karl
IEEE Journal of Solid-State Circuits, 1-7, 2018
462018
A 23.6-Mb/mm▓ SRAM in 10-nm FinFET Technology With Pulsed-pMOS TVC and Stepped-WL for Low-Voltage Applications
Z Guo, D Kim, S Nalam, J Wiedemer, X Wang, E Karl
IEEE Journal of Solid-State Circuits, 1-7, 2018
462018
A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS technology with capacitive charge-sharing write assist circuitry
E Karl, Z Guo, J Conary, J Miller, YG Ng, S Nalam, D Kim, J Keane, ...
IEEE Journal of Solid-State Circuits 51 (1), 222-229, 2015
432015
A 5.6 Mb/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology
J Keane, J Kulkarni, KH Koo, S Nalam, Z Guo, E Karl, K Zhang
2016 IEEE International Solid-State Circuits Conference (ISSCC), 308-309, 2016
422016
Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM
Y Wang, E Karl, M Meterelliyoz, F Hamzaoglu, YG Ng, S Ghosh, L Wei, ...
Electron Devices Meeting (IEDM), 2011 IEEE International, 32.1.1-32.1.4, 2011
412011
The impact of assist-circuit design for 22nm SRAM and beyond
E Karl, Z Guo, YG Ng, J Keane, U Bhattacharya, K Zhang
Electron Devices Meeting (IEDM), 2012 IEEE International, 25.1. 1-24.1. 4, 2012
352012
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