| III–V/Ge channel MOS device technologies in nano CMOS era S Takagi, R Zhang, J Suh, SH Kim, M Yokoyama, K Nishi, M Takenaka Japanese Journal of Applied Physics 54 (6S1), 06FA01, 2015 | 106 | 2015 |
| Investigation of the Changes in Electronic Properties of Nickel Oxide (NiOx) Due to UV/Ozone Treatment R Islam, G Chen, P Ramesh, J Suh, N Fuchigami, D Lee, KA Littau, ... ACS Applied Materials & Interfaces 9 (20), 17201-17207, 2017 | 95 | 2017 |
| Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications HD Lee, SG Kim, K Cho, H Hwang, H Choi, J Lee, SH Lee, HJ Lee, J Suh, ... 2012 Symposium on VLSI Technology (VLSIT), 151-152, 2012 | 75 | 2012 |
| MOS interface and channel engineering for high-mobility Ge/III-V CMOS S Takagi, R Zhang, SH Kim, N Taoka, M Yokoyama, JK Suh, R Suzuki, ... 2012 International Electron Devices Meeting, 23.1. 1-23.1. 4, 2012 | 57 | 2012 |
| Highly strained-SiGe-on-insulator p-channel metal-oxide-semiconductor field-effective transistors fabricated by applying Ge condensation technique to strained-Si-on-insulator … J Suh, R Nakane, N Taoka, M Takenaka, S Takagi Applied Physics Letters 99 (14), 2011 | 57 | 2011 |
| Passivation of multiple-quantum-well Ge0. 97Sn0. 03/Ge pin photodetectors M Morea, CE Brendel, K Zang, J Suh, CS Fenrich, YC Huang, H Chung, ... Applied Physics Letters 110 (9), 2017 | 33 | 2017 |
| Neural Stain Normalization and Unsupervised Classification of Cell Nuclei in Histopathological Breast Cancer Images E Yuan, J Suh https://arxiv.org/abs/1811.03815, 2018 | 19 | 2018 |
| Cubic-phase zirconia nano-island growth using atomic layer deposition and application in low-power charge-trapping nonvolatile-memory devices N El-Atab, TG Ulusoy, A Ghobadi, J Suh, R Islam, AK Okyay, K Saraswat, ... Nanotechnology 28 (44), 445201, 2017 | 14 | 2017 |
| Effects of additional oxidation after Ge condensation on electrical properties of germanium-on-insulator p-channel MOSFETs J Suh, R Nakane, N Taoka, M Takenaka, S Takagi Solid-State Electronics 117, 77-87, 2016 | 10 | 2016 |
| Low Resistance III-V Hetero-contacts to N-Ge J Suh, P Ramesh, AC Meng, A Kumar, A Kumar, S Gupta, R Islam, ... arXiv preprint arXiv:2106.15099, 2021 | 3 | 2021 |
| 3D-stacked strained SiGe/Ge gate-all-around (GAA) structure fabricated by 3D Ge condensation J Suh, AC Meng, M Jaikissoon, M Braun, TR Kim, AF Marshall, A Pakzad, ... 2019 Device Research Conference (DRC), 249-250, 2019 | 3 | 2019 |
| Semiconductor apparatus, method for fabricating the same, and variable resistive memory device JK Suh, KS Choi US Patent App. 14/329,555, 2015 | 3 | 2015 |
| Semiconductor device and method for fabricating the same JK Suh US Patent 9,076,866, 2015 | 3 | 2015 |
| Three-dimensional semiconductor device and a system having the same JK Suh US Patent App. 14/933,882, 2016 | 2 | 2016 |
| Semiconductor device and method for fabricating the same, and micro processor, processor, system, data storage system and memory system including the semiconductor device HJ Choi, J Suh US Patent App. 13/924,428, 2014 | 2 | 2014 |
| Resistance variable memory device J Suh US Patent App. 13/846,536, 2014 | 1 | 2014 |
| Highly-strained SGOI p-channel MOSFETs fabricated by applying Ge condensation technique to strained-SOI substrates J Suh, R Nakane, N Taoka, M Takenaka, S Takagi 69th Device Research Conference, 235-236, 2011 | 1 | 2011 |
| Silicon-Germanium/Germanium Nanowire Platform for Nanoelectronics and Nanophotonics J Suh Stanford University, 2020 | | 2020 |
| Fabrication of Ultra-Small Zirconia Nano-Islands Using Thermal Atomic Layer Deposition N El-Atab, J Suh, R Islam, KC Saraswat, A Nayfeh Electrochemical Society Meeting Abstracts 231, 2036-2036, 2017 | | 2017 |
| Three-dimensional semiconductor device and method of manufacturing the same JK Suh US Patent 9,209,226, 2015 | | 2015 |
Shinichi TakagiThe University of TokyoVerified email at ee.t.u-tokyo.ac.jp
