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Svetlana Yarmolik
Svetlana Yarmolik
Unknown affiliation
Verified email at sandisk.com
Title
Cited by
Cited by
Year
Address sequences and backgrounds with different Hamming distances for multiple run March tests
S Yarmolik
International journal of applied mathematics and computer science 18 (3), 329, 2008
262008
Multi background memory testing
SV Yarmolik, I Mrozek
2007 14th International Conference on Mixed Design of Integrated Circuits …, 2007
202007
Address sequences for multiple run march tests
VN Yarmolik, SV Yarmolik
Automatic Control and Computer Sciences 5, 59-68, 2006
172006
Counter sequences for memory test address generation
VN Yarmolik, B Sokol, SV Yarmolik
Mixed Design of Integrated Circuits and Systems: proc. 12th International …, 2005
152005
Address sequences for march tests to detect pattern sensitive faults
B Sokol, SV Yarmolik
Third IEEE International Workshop on Electronic Design, Test and …, 2006
142006
Marshevye testy dlya samotestirovaniya OZU
SV Yarmolik, AP Zankovich, AA Ivanyuk
RAM Self-Test March Tests, 2009
132009
Modified gray and counter sequences for memory test address generation
SV Yarmolik, VN Yarmolik
Proceedings of the International Conference Mixed Design of Integrated …, 2006
132006
Optimal memory address seeds for pattern sensitive faults detection
SV Yarmolik, B Sokol
2006 IEEE Design and Diagnostics of Electronic Circuits and systems, 218-219, 2006
112006
Controlled random tests
SV Yarmolik, VN Yarmolik
Automation and Remote Control 73 (10), 1704-1714, 2012
102012
The synthesis of probability tests with a small number of kits
SV Yarmolik, VN Yarmolik
Automatic Control and Computer Sciences 45 (3), 133-141, 2011
102011
The repeated nondestructive march tests with variable address sequences
VN Yarmolik, SV Yarmolik
Automation and Remote Control 68 (4), 688-698, 2007
102007
Memory address generation for multiple run march tests with different average hamming distance
SV Yarmolik, VN Yarmolik
Proc. IEEE East-West Design & Test Workshop (EWDTW’06), 212-216, 2006
102006
Address sequences
VN Yarmolik, SV Yarmolik
Automatic Control and Computer Sciences 48 (4), 207-213, 2014
52014
Iterative near pseudoexhaustive random testing
S Yarmolik
Informatics 2 (26), 66-75, 2010
52010
Memory pattern sensitive faults detection using multiple runs of March tests
SV Yarmolik, Y VN
Informatics 1 (9), 104-113, 2006
52006
Generating modified Sobol sequences for multiple run march memory tests
VN Yarmolik, SV Yarmolik
Automatic Control and Computer Sciences 47 (5), 242-247, 2013
42013
Address sequences generation for multiple run memory testing
SV Yarmolik, I Mrozek, B Sokol
6th International Conference on Computer Information Systems and Industrial …, 2007
42007
Quasi-random testing of computer systems
SV Yarmolik, VN Yarmolik
Informatics, 65-81, 2016
32016
Controlled method of random test synthesis
VN Yarmolik, I Mrozek, SV Yarmolik
Automatic Control and Computer Sciences 49 (6), 395-403, 2015
32015
Analyses of two run march tests with address decimation for BIST procedure
I Mrozek, SV Yarmolik
East-West Design & Test Symposium (EWDTS 2013), 1-4, 2013
32013
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Articles 1–20