| 120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board C Kumar HB, P Ravi, G Modi, N Kapre Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 16 | 2017 |
| Thermal Calibration of a Ring PC Chiang, KH Tan, G Modi, N Narang, Y Frans US Patent 10,651,933, 2020 | 2* | 2020 |
| Reconfigurable mixer design enabling multiple radio architectures JE McGrath, G Modi, R Wade US Patent 11,695,535, 2023 | 1 | 2023 |
| Circuit and method for dynamic clock skew compensation G Modi, CC Chan, A Abdulla, RN Remla US Patent 10,924,096, 2021 | 1 | 2021 |
| Serial lane-to-lane skew reduction RN Remla, G Modi, A Abdulla, CC Chan US Patent 11,314,277, 2022 | | 2022 |
| Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons S Maheshwari, G Modi, N Kapre 2016 26th International Conference on Field Programmable Logic and …, 2016 | | 2016 |
| Tile Based Layout of Custom FPGA Overlays & DWT Algorithm Development G MODI | | 2016 |
| Kinetic Energy Recovery System from the flow of exhaust in buildings and industries A Patnaik, G Modi, H Agarwal Int. J. Sci. Eng. Res. 4 (9), 865-867, 2013 | | 2013 |
Nachiket KapreUniversity of WaterlooVerified email at uwaterloo.ca
