| A novel state assignment method for Extended Burst-Mode FSM design using Genetic Algorithm T Curtinhas, DL Oliveira, LA Faria, O Saotome Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-7, 2014 | 14 | 2014 |
| SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous controllers T Curtinhas, DL Oliveira, D Bompean, LA Faria, L Romano 2014 IEEE 5th Latin American Symposium on Circuits and Systems, 1-4, 2014 | 12 | 2014 |
| Design of locally-clocked asynchronous finite state machines using synchronous CAD tools DL Oliveira, D Bompean, T Curtinhas, LA Faria 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2013 | 12 | 2013 |
| Implementation of locally-clocked XBM state machines on FPGAs using synchronous CAD tools FTDF Barbosa, DL De Oliveira, TS Curtinhas, L de Abreu Faria, ... IEEE Transactions on Circuits and Systems I: Regular Papers 64 (5), 1064-1074, 2017 | 11 | 2017 |
| Synthesis of locally-clocked asynchronous systems with bundled-data implementation on FPGAs K Garcia, DL Oliveira, T Curtinhas, R d'Amore 2014 IX Southern Conference on Programmable Logic (SPL), 1-6, 2014 | 9 | 2014 |
| A novel asynchronous interface with pausible clock for partitioned synchronous modules DL Oliveira, T Curtinhas, LA Faria, L Romano 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2015 | 7 | 2015 |
| A High Performance Implementation of Quasi Delay Insensitive Booleans Functions DL Oliveira, O Verducci, GC Batista, TS Curtinhas 2019 IEEE XXVI International Conference on Electronics, Electrical …, 2019 | 6 | 2019 |
| FPGA implementation of low-latency robust asynchronous interfaces for GALS systems T Curtinhas, DL Oliveira, O Saotome, JB Brandolin 2018 IEEE XXV International Conference on Electronics, Electrical …, 2018 | 6 | 2018 |
| A novel Κ convention logic (NCL) gates architecture based on basic gates DL Oliveira, O Verducci, LA Faria, T Curtinhas 2017 IEEE XXIV International Conference on Electronics, Electrical …, 2017 | 6 | 2017 |
| Design of asynchronous digital systems using two-phase bundled-data protocol DL Oliveira, D Bompean, L Faria, T Curtinhas, N Alles 2012 VI Andean Region International Conference, 73-76, 2012 | 6 | 2012 |
| A novel tool for synthesis by direct mapping of asynchronous circuits from extended STG specifications F Mendes, T Curtinhas, DL Oliveira, HA Delsoto, LA Faria 2018 31st International Conference on VLSI Design and 2018 17th …, 2018 | 5 | 2018 |
| VHDLASYN: A tool for synthesis of asynchronous systems from of VHDL behavioral specifications T Curtinhas, DL Oliveira, O Saotome 2018 2nd Conference on PhD Research in Microelectronics and Electronics …, 2018 | 4 | 2018 |
| Design of gated-clock asynchronous wrappers for multi-point GALS systems DL Oliveira, T Curtinhas, LA Faria, JLV Oliveira, L Romano 2016 IEEE ANDESCON, 1-4, 2016 | 4 | 2016 |
| A new asynchronous pipeline architecture of support vector machine classifier for ASR system GC Batista, DL Oliveira, O Saotome, TS Curtinhas 2019 IEEE XXVI International Conference on Electronics, Electrical …, 2019 | 3 | 2019 |
| State assignment of direct output synchronous FSMs using genetic algorithm T Curtinhas, DL Oliveira, O Verducci, O Saotome 2017 IEEE XXIV International Conference on Electronics, Electrical …, 2017 | 3 | 2017 |
| Design of low-power two-hot finite state machines operating on double-edge clock DL Oliveira, T Curtinhas, LA Faria, JLV Oliveira, L Romano 2016 IEEE ANDESCON, 1-4, 2016 | 3 | 2016 |
| Design of Asynchronous Wrappers for High-Concurrency Multi-Point GALS Systems DL Oliveira, T Curtinhas, VLV Torres, L Romano 2018 IEEE ANDESCON, 1-6, 2018 | 2 | 2018 |
| A design flow for locally-clocked XBM asynchronous state machines using synchronous CAD tools DL Oliveira, F Tuyama, T Curtinhas, LA Faria, JF Sousa 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 251-254, 2016 | 2 | 2016 |
| Design of low-latency asynchronous wrapper for GALS systems DL Oliveira, T Curtinhas, LA Faria, HA Delsoto, L Romano XVIII Simpósio de Aplicações Operacionais em Áreas de Defesa (SIGE), 2016 | 2 | 2016 |
| Design of synchronous pipeline digital systems operating in double-edge of the clock DL Oliveira, T Curtinhas, LA Faria, L Romano 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2013 | 2 | 2013 |
