Jorge Echavarria
Jorge Echavarria
Research Assistant of Computer Science, Friedrich Alexander Universität
Verified email at fau.de - Homepage
Title
Cited by
Cited by
Year
A LUT-based approximate adder
A Becher, J Echavarria, D Ziener, S Wildermann, J Teich
2016 IEEE 24th Annual International Symposium on Field-Programmable Custom …, 2016
112016
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs
J Echavarria, S Wildermann, A Becher, J Teich, D Ziener
2016 International Conference on Field-Programmable Technology (FPT), 213-216, 2016
72016
FSM merging and reduction for IP cores watermarking using genetic algorithms
J Echavarria, A Morales-Reyes, R Cumplido, MA Salido
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
62014
Design space exploration of multi-output logic function approximations
J Echavarria, S Wildermann, J Teich
Proceedings of the International Conference on Computer-Aided Design, 52, 2018
22018
Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders
J Echavarria, S Wildermann, E Potwigin, J Teich
IEEE Embedded Systems Letters 10 (2), 37-40, 2018
22018
Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics
J Pirkl, A Becher, J Echavarria, J Teich, S Wildermann
Proceedings of the 20th International Workshop on Software and Compilers for …, 2017
12017
Can Approximate Computing Reduce Power Consumption on FPGAs?
J Echavarria, K Schütz, A Becher, S Wildermann, J Teich
2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018
2018
Approximate Adder Structures on FPGAs
A Becher, J Echavarria, D Ziener, J Teich
Workshop on Approximate Computing 2015, 2015
2015
The system can't perform the operation now. Try again later.
Articles 1–8