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Winston Haaswijk
Winston Haaswijk
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Cited by
Year
The EPFL logic synthesis libraries
M Soeken, H Riener, W Haaswijk, E Testa, B Schmitt, G Meuli, F Mozafari, ...
arXiv preprint arXiv:1805.05121, 2018
1042018
Deep learning for logic optimization algorithms
W Haaswijk, E Collins, B Seguin, M Soeken, F Kaplan, S SŘsstrunk, ...
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2018
892018
A novel basis for logic rewriting
W Haaswijk, M Soeken, L Amar˙, PE Gaillardon, G De Micheli
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 151-156, 2017
742017
On-the-fly and DAG-aware: Rewriting Boolean networks with exact synthesis
H Riener, W Haaswijk, A Mishchenko, G De Micheli, M Soeken
2019 Design, Automation & Test in Europe Conference & Exhibition (DATEá…, 2019
622019
SAT-based exact synthesis: Encodings, topology families, and parallelism
W Haaswijk, M Soeken, A Mishchenko, G De Micheli
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2019
542019
SAT based exact synthesis using DAG topology families
W Haaswijk, A Mishchenko, M Soeken, G De Micheli
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
422018
Scalable generic logic synthesis: One approach to rule them all
H Riener, E Testa, W Haaswijk, A Mishchenko, L Amar¨, G De Micheli, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
372019
Practical exact synthesis
M Soeken, W Haaswijk, E Testa, A Mishchenko, LG Amar¨, RK Brayton, ...
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 309-314, 2018
322018
Mapping monotone Boolean functions into majority
E Testa, M Soeken, LG Amar¨, W Haaswijk, G De Micheli
IEEE Transactions on Computers 68 (5), 791-797, 2018
182018
LUT mapping and optimization for majority-inverter graphs
WJ Haaswijk, M Soeken, L Amaru, PE Gaillardon, G De Micheli
Proceedings of the 25th International Workshop on Logic & Synthesis (IWLS), 2016
182016
Classifying functions with exact synthesis
W Haaswijk, E Testa, M Soeken, G De Micheli
2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 272-277, 2017
162017
One-pass synthesis for field-coupled nanocomputing technologies
M Walter, W Haaswijk, R Wille, FS Torres, R Drechsler
Proceedings of the 26th Asia and South Pacific Design Automation Conferenceá…, 2021
152021
A novel basis for logic optimization
W Haaswijk, M Soeken, LG Amar¨, PE Gaillardon, G De Micheli
Asia and South Pacific Design Automation Conference, 151-156, 2017
112017
Exact synthesis of boolean functions in majority-of-five forms
Z Chu, W Haaswijk, M Soeken, Y Xia, L Wang, G De Micheli
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
102019
The EPFL Logic Synthesis Libraries (2019)
M Soeken, H Riener, W Haaswijk, E Testa, B Schmitt, G Meuli, F Mozafari, ...
arXiv preprint arXiv:1805.05121, 0
7
SAT-based exact synthesis for multi-level logic networks
WJ Haaswijk
EPFL, 2019
52019
Multi-level logic benchmarks: An exactness study
L Amar˙, M Soeken, W Haaswijk, E Testa, P Vuillod, J Luo, PE Gaillardon, ...
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 157-162, 2017
52017
NEM relay design with biconditional binary decision diagrams
W Haaswijk, L Amaru, PE Gaillardon, G De Micheli
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscaleá…, 2015
42015
Logic optimization of majority-inverter graphs
H Riener, E Testa, W Haaswijk, A Mishchenko, L Amar˙, G De Micheli, ...
MBMV 2019; 22nd Workshop-Methods and Description Languages for Modelling andá…, 2019
32019
Integrated ESOP refactoring for industrial designs
W Haaswijk, LG Amaru, P Vuillod, J Luo, M Soeken, G De Micheli
2018 25th IEEE International Conference on Electronics, Circuits and Systemsá…, 2018
32018
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