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Evangeline F.Y. Young
Evangeline F.Y. Young
Bestätigte E-Mail-Adresse bei cse.cuhk.edu.hk - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Handbook of algorithms for physical design automation
CJ Alpert, DP Mehta, SS Sapatnekar
CRC press, 2008
3062008
Ripple: An effective routability-driven placer by iterative cell movement
X He, T Huang, L Xiao, H Tian, G Cui, EFY Young
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 74-79, 2011
127*2011
Twin binary sequences: A nonredundant representation for general nonslicing floorplan
EFY Young, CCN Chu, ZC Shen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
1112003
Layout hotspot detection with feature tensor generation and deep biased learning
H Yang, J Su, Y Zou, Y Ma, B Yu, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
1032018
Integrated floorplanning and interconnect planning
HM Chen, MDF Wong, H Zhou, FY Young, HH Yang, N Sherwani
Layout optimization in VLSI design, 1-18, 2001
1012001
An efficient layout decomposition approach for triple patterning lithography
J Kuang, EFY Young
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2013
952013
GAN-OPC: Mask optimization with lithography-guided generative adversarial nets
H Yang, S Li, Z Deng, Y Ma, B Yu, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
822019
Enabling online learning in lithography hotspot detection with information-theoretic feature optimization
H Zhang, B Yu, EFY Young
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
752016
Slicing floorplans with boundary constraints
FY Young, DF Wong, HH Yang
IEEE transactions on computer-aided design of integrated circuits and …, 1999
741999
Simultaneous handling of symmetry, common centroid, and general placement constraints
Q Ma, L Xiao, YC Tam, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
702010
Analog placement with symmetry and other placement constraints
YC Tam, EFY Young, C Chu
2006 IEEE/ACM International Conference on Computer Aided Design, 349-354, 2006
702006
Routability-driven floorplanner with buffer block planning
CW Sham, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
692003
Placement constraints in floorplan design
EFY Young, CCN Chu, ML Ho
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (7), 735-745, 2004
652004
Slicing floorplans with pre-placed modules
FY Young, DF Wong
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998
631998
Analog placement with common centroid constraints
Q Ma, EFY Young, KP Pun
2007 IEEE/ACM International Conference on Computer-Aided Design, 579-585, 2007
622007
Slicing floorplans with range constraint
FY Young, DF Wong, HH Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
602000
Fast and accurate estimation of quality of results in high-level synthesis with machine learning
S Dai, Y Zhou, H Zhang, E Ustun, EFY Young, Z Zhang
2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018
592018
Post-placement voltage island generation
RLS Ching, EFY Young, KCK Leung, C Chu
2006 IEEE/ACM International Conference on Computer Aided Design, 641-646, 2006
582006
Obstacle-avoiding rectilinear Steiner minimum tree construction: An optimal approach
T Huang, EFY Young
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 610-613, 2010
56*2010
Handling soft modules in general nonslicing floorplan using Lagrangian relaxation
FY Young, CCN Chu, WS Luk, YC Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001
562001
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