An 8.5 mW Continuous-Time JG Kauffman, P Witte, J Becker, M Ortmanns
IEEE Journal of Solid-State Circuits 46 (12), 2869-2881, 2011
108 2011 A 72 dB DR, CT ΔΣ modulator using digitally estimated, auxiliary DAC linearization achieving 88 fJ/conv-step in a 25 MHz BW JG Kauffman, P Witte, M Lehmann, J Becker, Y Manoli, M Ortmanns
IEEE Journal of Solid-State Circuits 49 (2), 392-404, 2013
75 2013 A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW P Witte, JG Kauffman, J Becker, Y Manoli, M Ortmanns
2012 IEEE International Solid-State Circuits Conference, 154-156, 2012
59 2012 An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization JG Kauffman, P Witte, J Becker, M Ortmanns
2011 IEEE International Solid-State Circuits Conference, 472-474, 2011
50 2011 A 10 MHz bandwidth, 70 dB SNDR continuous time delta-sigma modulator with digitally improved reconfigurable blocker rejection R Ritter, JG Kauffman, J Becker, M Ortmanns
IEEE Journal of Solid-State Circuits 51 (3), 660-670, 2016
35 2016 A 67dB DR 50MHz BW CT Delta Sigma modulator achieving 207 fJ/conv JG Kauffman, C Chu, J Becker, M Ortmanns
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 401-404, 2013
16 2013 Apparatus for overload recovery of an integrator in a sigma-delta modulator JG Kauffman, K Dufrene
US Patent 9,680,496, 2017
15 2017 A 0.9-V DAC-calibration-free continuous-time incremental delta–sigma modulator achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS MA Mokhtar, A Abdelaal, M Sporer, J Becker, JG Kauffman, M Ortmanns
IEEE Journal of Solid-State Circuits 57 (11), 3407-3417, 2022
11 2022 Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog converter correction M Bresciani, JG Kauffman, U Schuetz, P Torta, F Conzatti
US Patent 9,866,227, 2018
10 2018 A direct digitizing chopped neural recorder using a body-induced offset based DC servo loop M Sporer, S Reich, JG Kauffman, M Ortmanns
IEEE Transactions on Biomedical Circuits and Systems 16 (3), 409-418, 2022
9 2022 A correlation-based background error estimation technique for bandpass Delta–Sigma ADC DACs P Witte, JG Kauffman, J Becker, M Ortmanns
IEEE Transactions on Circuits and Systems II: Express Briefs 58 (11), 748-752, 2011
9 2011 FIR DACs in CT incremental delta-sigma modulators MA Mokhtar, P Vogelmann, A Abdelaal, JG Kauffman, M Ortmanns
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
7 2020 A DAC cell with improved ISI and noise performance using native switching for multi-bit CT Delta Sigma modulators JG Kauffman, R Ritter, C Chu, M Ortmanns
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 574-577, 2013
7 2013 Minimizing signal-dependent residue in CT pipelined ADCs J Ungethüm, JG Kauffman, M Ortmanns
2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021
6 2021 A 0.9-V calibration-free 97dB-SFDR 2-MS/s continuous time incremental delta-sigma ADC utilizing variable bit width quantizer in 28nm CMOS MA Mokhtar, A Abdelaal, M Sporer, J Becker, JG Kauffman, M Ortmanns
2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021
6 2021 Analysis and design of high speed/high linearity continuous time delta-sigma modulator C Chu, T Brückner, JG Kauffman, J Anders, J Becker, M Ortmanns
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1268-1271, 2013
6 2013 A multi-mode GSM to LTE100 ADC J Sauerbrey, JSP Garcia, U Schütz, H Khushk, JG Kauffman
ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018
5 2018 Influence of excess loop delay on the STF of continuous-time delta-sigma modulators M Pietzko, J Wagner, A Abdelaal, JG Kauffman, M Ortmanns
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
4 2021 Apparatus for correcting linearity of a digital-to-analog converter JG Kauffman, U Schuetz
US Patent 10,243,574, 2019
4 2019 Low supply class AB output amplifier JG Kauffman
US Patent 9,859,856, 2018
4 2018 