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Ahmed M. Abdelsalam
Ahmed M. Abdelsalam
Hardware Engineer, Microsoft Azure
Verified email at microsoft.com - Homepage
Title
Cited by
Cited by
Year
A highly parallel SAD architecture for motion estimation in HEVC encoder
A Medhat, A Shalaby, MS Sayed, M Elsabrouty, F Mehdipour
2014 IEEE Asia Pacific conference on circuits and systems (APCCAS), 280-283, 2014
432014
A configurable FPGA implementation of the tanh function using DCT interpolation
AM Abdelsalam, JMP Langlois, F Cheriet
2017 IEEE 25th annual international symposium on field-programmable custom …, 2017
272017
Real-Time Defects Detection System for Orange Citrus Fruits Using Multi-Spectral Imaging
AM Abdelsalam, MS Sayed
IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), 1-4, 2016
252016
Adaptive low‐complexity motion estimation algorithm for high efficiency video coding encoder
A Medhat, A Shalaby, MS Sayed, M Elsabrouty, F Mehdipour
IET Image Processing 10 (6), 438-447, 2016
242016
An efficient FPGA-based overlay inference architecture for fully connected DNNs
AM Abdelsalam, F Boulet, G Demers, JMP Langlois, F Cheriet
2018 International conference on reconfigurable computing and FPGAs …, 2018
222018
High-throughput hardware implementation for motion estimation in HEVC encoder
A Medhat, A Shalaby, MS Sayed
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
212015
Fast center search algorithm with hardware implementation for motion estimation in HEVC encoder
A Medhat, A Shalaby, MS Sayed, M Elsabrouty, F Mehdipour
2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014
122014
Accurate and efficient hyperbolic tangent activation function on fpga using the dct interpolation filter
AM Abdelsalam, JM Langlois, F Cheriet
arXiv preprint arXiv:1609.07750, 2016
112016
Neural networks based fractional pixel motion estimation for HEVC
EM Ibrahim, E Badry, AM Abdelsalam, IL Abdalla, M Sayed, H Shalaby
2018 IEEE International Symposium on Multimedia (ISM), 110-113, 2018
92018
POLYBiNN: a scalable and efficient combinatorial inference engine for neural networks on FPGA
AM Abdelsalam, A Elsheikh, JP David, JMP Langlois
2018 Conference on Design and Architectures for Signal and Image Processing …, 2018
92018
Towards an FPGA-Based HEVC Encoder: A Low-Complexity Rate Distortion Scheme for AMVP
AM Abdelsalam, A Shalaby, MS Sayed
Circuits, Systems, and Signal Processing, 1-20, 2017
62017
POLYBiNN: Binary inference engine for neural networks using decision trees
AM Abdelsalam, A Elsheikh, S Chidambaram, JP David, JMP Langlois
Journal of Signal Processing Systems 92, 95-107, 2020
52020
POLYCiNN: Multiclass Binary Inference Engine using Convolutional Decision Forests
AM Abdelsalam, A Elsheikh, JP David, JMP Langlois
2019 Conference on Design and Architectures for Signal and Image Processing …, 2019
22019
Neural Network based Transceiver for Non-Coherent OFDM Optical Modulation
A Ibrahim, A Elsheikh, AM Abdelsalam, J Prat
2023 25th International Conference on Advanced Communication Technology …, 2023
12023
Non-Coherent Optical OFDM Transceiver based Machine learning: Regression Tree
A Ibrahim, A Elsheikh, AM Abdelsalam, J Prat
2022 OPJU International Technology Conference on Emerging Technologies for …, 2023
2023
Efficient FPGA-Based Inference Architectures for Deep Learning Networks
A Abdelsalam
Ecole Polytechnique, Montreal (Canada), 2019
2019
A novel algorithm with FPGA implementation for action and gesture recognition employing spatiotemporal gradient in the transform domain
Ehab H. El-Shazly, Ahmed Medhat, Moataz M. Abdelwahab, and Mohammed S. Sayed
Imaging Systems and Techniques (IST), 2014 IEEE International Conference on, 2014
2014
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