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Sagar Saxena
Sagar Saxena
RET / OPC Engineer @ Siemens EDA
Verified email at g.rit.edu
Title
Cited by
Cited by
Year
Distracted driver detection: Deep learning vs handcrafted features
MD Hssayeni, S Saxena, R Ptucha, A Savakis
Electronic Imaging 29, 20-26, 2017
902017
The advances, challenges and future possibilities of millimeter-wave chip-to-chip interconnections for multi-chip systems
A Ganguly, MM Ahmed, R Singh Narde, A Vashist, MS Shamim, ...
Journal of Low Power Electronics and Applications 8 (1), 5, 2018
362018
Scalable and energy efficient wireless inter chip interconnection fabrics using THz-band antennas
S Saxena, DS Manur, N Mansoor, A Ganguly
Journal of Parallel and Distributed Computing 139, 148-160, 2020
202020
A folded wireless network-on-chip using graphene based THz-band antennas
S Saxena, DS Manur, MS Shamim, A Ganguly
Proceedings of the 4th acm international conference on nanoscale computing …, 2017
202017
EUV full-chip curvilinear mask options for logic via and metal patterning
N Lafferty, S Saxena, K Mizuuchi, Y Ma, X Zhang, P LaCour, A Tritchkov, ...
DTCO and Computational Patterning II 12495, 96-110, 2023
32023
An integrated verification flow for curvilinear mask
S Wang, S Shang, S Saxena, X Zhang, G Lippincott, L Hong, ...
DTCO and Computational Patterning III 12954, 1295415, 2024
2024
Energy-efficiency in interconnection fabrics for inter and intra-chip communication using Graphene-based THz-band antennas
S Saxena
2017 Eighth International Green and Sustainable Computing Conference (IGSC), 2017
2017
A Scalable and Energy Efficient Graphene-Based Interconnection Framework for Intra and Inter-Chip Wireless Communication in Terahertz Band
S Saxena
Rochester Institute of Technology, 2017
2017
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