| On-the-Fly Adaptive Routing in High-Radix Hierarchical Networks M Garcıa, E Vallejo, R Beivide, M Odriozola, C Camarero, M Valero, ... The 41st International Conference on Parallel Processing, 2012 | 92 | 2012 |
| The Mont-Blanc prototype: an alternative approach for HPC systems N Rajovic, A Rico, F Mantovani, D Ruiz, JO Vilarrubi, C Gomez, L Backes, ... Proceedings of the International Conference for High Performance Computing …, 2016 | 90 | 2016 |
| Efficient Routing Mechanisms for Dragonfly Networks M Garcıa, E Vallejo, R Beivide, M Odriozola, M Valero International Conference on Parallel Processing (ICPP'13), 2013 | 75 | 2013 |
| Twisted torus topologies for enhanced interconnection networks JM Cámara, M Moretó, E Vallejo, R Beivide, J Miguel-Alonso, C Martínez, ... Parallel and Distributed Systems, IEEE Transactions on 21 (12), 1765-1778, 2010 | 71 | 2010 |
| Implementing kilo-instruction multiprocessors E Vallejo, M Galluzzi, A Cristal, F Vallejo, R Beivide, P Stenstrom, ... Pervasive Services, 2005. ICPS'05. Proceedings. International Conference on …, 2005 | 50 | 2005 |
| Topological Characterization of Hamming and Dragonfly Networks and its Implications on Routing C Camarero, E Vallejo, R Beivide ACM Transactions on Architecture and Code Optimization (TACO) 11 (4), 39, 2015 | 47 | 2015 |
| Dense Gaussian networks: Suitable topologies for on-chip multiprocessors C Martínez, E Vallejo, R Beivide, C Izu, M Moretó International Journal of Parallel Programming 34 (3), 193-211, 2006 | 43 | 2006 |
| Architectural Support for Fair Reader-Writer Locking E Vallejo, R Beivide, A Cristal, T Harris, F Vallejo, O Unsal, M Valero Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on …, 2010 | 36 | 2010 |
| Contention-based nonminimal adaptive routing in high-radix networks P Fuentes, E Vallejo, M García, R Beivide, G Rodríguez, C Minkenberg, ... IEEE 29th International Parallel and Distributed Processing Symposium (IPDPS …, 2015 | 31 | 2015 |
| OFAR-CM: Efficient Dragonfly Networks with Simple Congestion Management M Garcıa, E Vallejo, R Beivide, M Valero, G Rodrıguez The 21st Annual Symposium on High-Performance Interconnects (HOTI-21), 2013 | 31 | 2013 |
| CATA: Criticality Aware Task Acceleration for Multicore Processors E Castillo, M Moreto, M Casas, L Alvarez, E Vallejo, K Chronaki, R Badia, ... IEEE International Parallel and Distributed Processing Symposium, 2016 | 25 | 2016 |
| Mixed-radix twisted torus interconnection networks JM Cámara, M Moretó, E Vallejo, R Beivide, J Miguel-Alonso, C Martinez, ... 2007 IEEE International Parallel and Distributed Processing Symposium, 1-10, 2007 | 25 | 2007 |
| SMART++ reducing cost and improving efficiency of multi-hop bypass in NoC routers I Pérez, E Vallejo, R Beivide Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip …, 2019 | 21 | 2019 |
| Architectural Support for Task Dependence Management with Flexible Software Scheduling E Castillo, L Alvarez, M Moreto, M Casas, E Vallejo, JL Bosque, R Beivide, ... 24th IEEE International Symposium on High Performance Computer Architecture …, 2018 | 21 | 2018 |
| Performance implications of remote-only load balancing under adversarial traffic in Dragonflies B Prisacari, G Rodriguez, M Garcia, E Vallejo, R Beivide, C Minkenberg Proceedings of the 8th International Workshop on Interconnection Network …, 2014 | 21 | 2014 |
| Hybrid transactional memory to accelerate safe lock-based transactions E Vallejo, T Harris, A Cristal Kestelman, OS Unsal, M Valero Cortés TRANSACT 2008: 3rd ACM SIGPLAN Workshop on Transactional Computing: February …, 2008 | 21 | 2008 |
| Projective networks: Topologies for large parallel computer systems C Camarero, C Martínez, E Vallejo, R Beivide IEEE Transactions on Parallel and Distributed Systems 28 (7), 2003-2016, 2017 | 19 | 2017 |
| On the Use of Commodity Ethernet Technology in Exascale HPC Systems M Benito, E Vallejo, R Beivide IEEE International Conference on High Performance Computing, 2015 | 17 | 2015 |
| Efficient Router Bypass via Hybrid Flow Control I Pérez, E Vallejo, R Beivide 2018 11th International Workshop on Network on Chip Architectures (NoCArc), 1-6, 2018 | 16 | 2018 |
| Global misrouting policies in two-level hierarchical networks M García, E Vallejo, R Beivide, M Odriozola, C Camarero, M Valero, ... Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi …, 2013 | 16 | 2013 |
Ramon BeivideProfessor Computer Architecture (Universidad de Cantabria)Bestätigte E-Mail-Adresse bei unican.es
