Sven Goossens
Sven Goossens
Intrinsic ID
Bestätigte E-Mail-Adresse bei intrinsic-id.com
Titel
Zitiert von
Zitiert von
Jahr
T-CREST: Time-predictable multi-core architecture for embedded systems
M Schoeberl, S Abbaspour, B Akesson, N Audsley, R Capasso, J Garside, ...
Journal of Systems Architecture 61 (9), 449-471, 2015
1492015
DRAMPower: Open-source DRAM power & energy estimation tool
K Chandrasekar, C Weis, Y Li, B Akesson, N Wehn, K Goossens
URL: http://www. drampower. info 22, 2012
1102012
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow
K Goossens, A Azevedo, K Chandrasekar, MD Gomony, S Goossens, ...
ACM SIGBED Review 10 (3), 23-34, 2013
992013
Exploiting expendable process-margins in DRAMs for run-time performance optimization
K Chandrasekar, S Goossens, C Weis, M Koedam, B Akesson, N Wehn, ...
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
752014
Conservative open-page policy for mixed time-criticality memory controllers
S Goossens, B Akesson, K Goossens
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 525-530, 2013
632013
A reconfigurable real-time SDRAM controller for mixed time-criticality systems
S Goossens, J Kuijsten, B Akesson, K Goossens
2013 international conference on hardware/software codesign and system …, 2013
582013
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs
C Weis, M Jung, P Ehses, C Santos, P Vivet, S Goossens, M Koedam, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 495-500, 2015
282015
Memory-map selection for firm real-time SDRAM controllers
S Goossens, T Kouters, B Akesson, K Goossens
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 828-831, 2012
262012
Power/performance trade-offs in real-time SDRAM command scheduling
S Goossens, K Chandrasekar, B Akesson, K Goossens
IEEE Transactions on Computers 65 (6), 1882-1895, 2015
182015
The CompSOC design flow for virtual execution platforms
S Goossens, B Akesson, M Koedam, AB Nejad, A Nelson, K Goossens
Proceedings of the 10th FPGAworld conference, 1-6, 2013
182013
NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications.
K Goossens, M Koedam, A Nelson, S Sinha, S Goossens, Y Li, G Breaban, ...
Handbook of hardware/software codesign, 491-530, 2017
162017
Memory controllers for mixed-time-criticality systems
S Goossens, K Chandrasekar, B Akesson, K Goossens
Springer International Publishing, 2016
122016
SIMD memory circuit and methodology to support upsampling, downsampling and transposition
D Van Kampen, K Van Berkel, S Goossens, W Kloosterhuis, ...
US Patent 9,529,571, 2016
22016
An SIMD register file with support for dual-phase decimation and transposition
SLM Goossens
Master thesis, TU/e, 2010
22010
Reconfigurable Real-Time Memory Controller Architecture
S Goossens, K Chandrasekar, B Akesson, K Goossens
Memory Controllers for Mixed-Time-Criticality Systems, 17-56, 2016
12016
Long-term continuous assessment of SRAM PUF and source of random numbers
R Wang, G Selimis, R Maes, S Goossens
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 7-12, 2020
2020
Reconfiguration
S Goossens, K Chandrasekar, B Akesson, K Goossens
Memory Controllers for Mixed-Time-Criticality Systems, 145-165, 2016
2016
Cycle-Accurate SDRAM Power Modeling
S Goossens, K Chandrasekar, B Akesson, K Goossens
Memory Controllers for Mixed-Time-Criticality Systems, 93-109, 2016
2016
Memory Patterns
S Goossens, K Chandrasekar, B Akesson, K Goossens
Memory Controllers for Mixed-Time-Criticality Systems, 57-91, 2016
2016
Conservative Open-Page Policy
S Goossens, K Chandrasekar, B Akesson, K Goossens
Memory Controllers for Mixed-Time-Criticality Systems, 125-144, 2016
2016
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