Rawan Naous
Rawan Naous
Bestätigte E-Mail-Adresse bei berkeley.edu
Zitiert von
Zitiert von
Memristors empower spiking neurons with stochasticity
M Al-Shedivat, R Naous, G Cauwenberghs, KN Salama
IEEE journal on Emerging and selected topics in circuits and systems 5 (2 …, 2015
Stochasticity Modeling in Memristors
R Naous, M Al-Shedivat, KN Salama
IEEE Transactions on Nanotechnology, 2016
Single-readout high-density memristor crossbar
MA Zidan, H Omran, R Naous, A Sultan, HAH Fahmy, WD Lu, KN Salama
Scientific reports 6 (1), 1-9, 2016
A configurable multi-ported register file architecture for soft processor cores
MAR Saghir, R Naous
International Workshop on Applied Reconfigurable Computing, 14-25, 2007
Memristor-based neural networks: Synaptic versus neuronal stochasticity
R Naous, M AlShedivat, E Neftci, G Cauwenberghs, KN Salama
Aip Advances 6 (11), 111304, 2016
gTBS: a green Task-Based sensing for energy efficient wireless sensor networks
A Alhalafi, L Sboui, R Naous, B Shihada
Proc. of the IEEE Conference on Computer Communications Workshops (INFOCOM …, 2016
Inherently stochastic spiking neurons for probabilistic neural computation
M Al-Shedivat, R Naous, E Neftci, G Cauwenberghs, KN Salama
2015 7th International IEEE/EMBS Conference on Neural Engineering (NER), 356-359, 2015
Memristor based crossbar memory array sneak path estimation
R Naous, MA Zidan, A Sultan-Salem, KN Salama
2014 14th International Workshop on Cellular Nanoscale Networks and their …, 2014
Approximate computing with stochastic memristors
R Naous, KN Salama
CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and …, 2016
Pilot assisted readout for passive memristor crossbars
KNS Rawan Naous, Mohamed Affan Zidan, Ahmed Sultan
Microelectronics Journal, 2016
Stochastic synaptic plasticity with memristor crossbar arrays
R Naous, M Al-Shedivat, E Neftci, G Cauwenberghs, KN Salama
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2078-2081, 2016
Design and Analysis of 2T-2M Ternary Content Addressable Memories
MA Bahloul, ME Fouda, R Naous, MA Zidan, AM Eltawil, F Kurdahi, ...
A 7-nm compute-in-memory SRAM macro supporting multi-bit input, weight and output and achieving 351 TOPS/W and 372.4 GOPS
ME Sinangil, B Erbagci, R Naous, K Akarvardar, D Sun, WS Khwa, ...
IEEE Journal of Solid-State Circuits 56 (1), 188-198, 2020
Structured deep neural network pruning via matrix pivoting
R Sredojevic, S Cheng, L Supic, R Naous, V Stojanovic
arXiv preprint arXiv:1712.01084, 2017
An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications
YD Chih, PH Lee, H Fujiwara, YC Shih, CF Lee, R Naous, YL Chen, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 252-254, 2021
Hardware emulation of memristor based ternary content addressable memory
MA Bahloul, R Naous, M Masmoudi
2017 14th International Multi-Conference on Systems, Signals & Devices (SSD …, 2017
Von-neumann and beyond: Memristor architectures
R Naous
Approximate computing with stochastic transistors’ voltage over-scaling
R Li, R Naous, H Fariborzi, KN Salama
IEEE Access 7, 6373-6385, 2018
Mpdcompress-matrix permutation decomposition algorithm for deep neural network compression
L Supic, R Naous, R Sredojevic, A Faust, V Stojanovic
arXiv preprint arXiv:1805.12085, 2018
Channel equalization techniques for non-volatile memristor memories
R Naous, MA Zidan, A Sultan, KN Salama
2016 Annual Conference on Information Science and Systems (CISS), 111-116, 2016
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