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R. Iris Bahar
R. Iris Bahar
School of Engineering, Dept. of Computer Science, Brown University
Verified email at brown.edu - Homepage
Title
Cited by
Cited by
Year
Algebric decision diagrams and their applications
RI Bahar, EA Frohm, CM Gaona, GD Hachtel, E Macii, A Pardo, ...
Formal methods in system design 10, 171-206, 1997
11811997
DRUM: A dynamic range unbiased multiplier for approximate applications
S Hashemi, RI Bahar, S Reda
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 418-425, 2015
4022015
Power and energy reduction via pipeline balancing
RI Bahar, S Manne
ACM SIGARCH Computer Architecture News 29 (2), 218-229, 2001
2872001
ABACUS: A technique for automated behavioral synthesis of approximate computing circuits
K Nepal, Y Li, RI Bahar, S Reda
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
2312014
Power and performance tradeoffs using various caching strategies
RI Bahar, G Albera, S Manne
Proceedings of the 1998 international symposium on Low power electronics and …, 1998
1731998
Understanding the impact of precision quantization on the accuracy and energy of neural networks
S Hashemi, N Anthony, H Tann, RI Bahar, S Reda
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
1672017
A probabilistic-based design methodology for nanoscale computation
RI Bahar, J Mundy, J Chen
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
1532003
Ensuring write ordering under writeback cache error conditions
RL Stamm, RI Bahar, RL Strouble, ND Wade, JH Edmondson
US Patent 5,347,648, 1994
1391994
Error transition mode for multi-processor system
RL Stamm, RI Bahar, M Callander, L Chao, DR Meyer, D Sanders, ...
US Patent 5,155,843, 1992
1271992
Architectures for silicon nanoelectronics and beyond
RI Bahar, D Hammerstrom, J Harlow, WH Joyner, C Lau, D Marculescu, ...
Computer 40 (1), 25-33, 2007
1132007
Designing logic circuits for probabilistic computation in the presence of noise
K Nepal, RI Bahar, J Mundy, WR Patterson, A Zaslavsky
Proceedings of the 42nd Annual Design Automation Conference, 485-490, 2005
1112005
Runtime configurable deep neural networks for energy-accuracy trade-off
H Tann, S Hashemi, RI Bahar, S Reda
Proceedings of the eleventh ieee/acm/ifip international conference on …, 2016
932016
Nano, quantum and molecular computing
SK Shukla, RI Bahar
Kluwer Academic, 2004
852004
Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills
RL Stamm, RI Bahar, ND Wade
US Patent 5,404,483, 1995
851995
Hardware-software codesign of accurate, multiplier-free deep neural networks
H Tann, S Hashemi, RI Bahar, S Reda
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
842017
Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors
R Maro, Y Bai, RI Bahar
Power-Aware Computer Systems: First International Workshop, PACS 2000 …, 2001
812001
Automated high-level generation of low-power approximate computing circuits
K Nepal, S Hashemi, H Tann, RI Bahar, S Reda
IEEE Transactions on Emerging Topics in Computing 7 (1), 18-30, 2016
732016
A low-power dynamic divider for approximate applications
S Hashemi, RI Bahar, S Reda
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
722016
Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems
C Ferri, S Wood, T Moreshet, RI Bahar, M Herlihy
Journal of Parallel and Distributed Computing 70 (10), 1042-1052, 2010
582010
Parametric yield management for 3D ICs: Models and strategies for improvement
C Ferri, S Reda, RI Bahar
ACM Journal on Emerging Technologies in Computing Systems (JETC) 4 (4), 1-22, 2008
582008
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