| IMITATOR 2.5: A tool for analyzing robustness in scheduling problems É André, L Fribourg, U Kühne, R Soulat International Symposium on Formal Methods, 33-36, 2012 | 118 | 2012 |
| Formal verification of integer multipliers by combining Gröbner basis with logic reduction A Sayed-Ahmed, D Große, U Kühne, M Soeken, R Drechsler 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016 | 94 | 2016 |
| HW/SW co-verification of embedded systems using bounded model checking D Groβe, U Kühne, R Drechsler Proceedings of the 16th ACM Great Lakes symposium on VLSI, 43-48, 2006 | 83 | 2006 |
| WoLFram-a word level framework for formal verification A Sülflow, U Kühne, G Fey, D Grosse, R Drechsler 2009 IEEE/IFIP International Symposium on Rapid System Prototyping, 11-17, 2009 | 45 | 2009 |
| Analyzing functional coverage in bounded model checking D Große, U Kuhne, R Drechsler IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 40 | 2008 |
| Estimating functional coverage in bounded model checking D Große, U Kuhne, R Drechsler 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 39 | 2007 |
| Increasing the accuracy of SAT-based debugging A Sulflow, G Fey, C Braunstein, U Kuhne, R Drechsler 2009 Design, Automation & Test in Europe Conference & Exhibition, 1326-1331, 2009 | 33 | 2009 |
| Completeness-driven development R Drechsler, M Diepenbeck, D Große, U Kühne, HM Le, J Seiter, ... International Conference on Graph Transformation, 38-50, 2012 | 29 | 2012 |
| Side channel attacks for architecture extraction of neural networks H Chabanne, JL Danger, L Guiga, U Kühne CAAI Transactions on Intelligence Technology 6 (1), 3-16, 2021 | 25 | 2021 |
| A generic representation of CCSL time constraints for UML/MARTE models J Peters, R Wille, N Przigoda, U Kühne, R Drechsler Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 25 | 2015 |
| Towards efficient and automated side channel evaluations at design time D Sijacic, J Balasch, B Yang, S Ghosh, I Verbauwhede Kalpa Publications in Computing 7, 16-31, 2018 | 24 | 2018 |
| Finite controlled invariants for sampled switched systems L Fribourg, U Kühne, R Soulat Formal Methods in System Design 45, 303-329, 2014 | 23 | 2014 |
| Automated formal verification of processors based on architectural models U Kühne, S Beyer, J Bormann, J Barstow Formal Methods in Computer Aided Design, 129-136, 2010 | 22 | 2010 |
| CCFI-cache: A transparent and flexible hardware protection for code and control-flow integrity JL Danger, A Facon, S Guilley, K Heydemann, U Kühne, AS Merabet, ... 2018 21st Euromicro Conference on Digital System Design (DSD), 529-536, 2018 | 19 | 2018 |
| Formal modeling and verification of cyber-physical systems R Drechsler, U Kühne 1st International Summer School on Methods and Tools for the Design of …, 2015 | 19 | 2015 |
| Simulation-based equivalence checking between SystemC models at different levels of abstraction D Große, M Groß, U Kühne, R Drechsler Proceedings of the 21st edition of the great lakes symposium on Great lakes …, 2011 | 19 | 2011 |
| Wissenschaftstheorie U Kühne Hans Jörg Sandkühler (ed.): Enzyklopädie Philosophie, 1999 | 16 | 1999 |
| Evaluation of SAT like proof techniques for formal verification of word level circuits A Sülflow, U Kühne, R Wille, D Große, R Drechsler IEEE Workshop on RTL and High Level Testing, 31-36, 2007 | 15 | 2007 |
| Verifying consistency between activity diagrams and their corresponding OCL contracts C Hilken, J Seiter, R Wille, U Kühne, R Drechsler Proceedings of the 2014 Forum on Specification and Design Languages (FDL …, 2014 | 14 | 2014 |
| Parametric verification and test coverage for hybrid automata using the inverse method L Fribourg, U Kühne International Workshop on Reachability Problems, 191-204, 2011 | 14 | 2011 |
Rolf DrechslerProfessor at University of Bremen, Director DFKI Bremen, GermanyBestätigte E-Mail-Adresse bei uni-bremen.de
