Venkatraman Govindaraju
Venkatraman Govindaraju
Zugehörigkeit unbekannt
Bestätigte E-Mail-Adresse bei cs.wisc.edu - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Dynamically specialized datapaths for energy efficient computing
V Govindaraju, CH Ho, K Sankaralingam
2011 IEEE 17th International Symposium on High Performance Computer …, 2011
2662011
Dyser: Unifying functionality and parallelism specialization for energy-efficient computing
V Govindaraju, CH Ho, T Nowatzki, J Chhugani, N Satish, ...
IEEE Micro 32 (5), 38-51, 2012
1832012
Sampling+ dmr: practical and low-overhead permanent fault detection
S Nomura, MD Sinclair, CH Ho, V Govindaraju, M De Kruijf, ...
ACM SIGARCH Computer Architecture News 39 (3), 201-212, 2011
682011
Toward a multicore architecture for real-time ray-tracing
V Govindaraju, P Djeu, K Sankaralingam, M Vernon, WR Mark
2008 41st IEEE/ACM International Symposium on Microarchitecture, 176-187, 2008
602008
Design, integration and implementation of the DySER hardware accelerator into OpenSPARC
J Benson, R Cofell, C Frericks, CH Ho, V Govindaraju, T Nowatzki, ...
IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012
552012
A many-core architecture for in-memory data processing
SR Agrawal, S Idicula, A Raghavan, E Vlachos, V Govindaraju, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
262017
Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG
V Govindaraju, T Nowatzki, K Sankaralingam
Proceedings of the 22nd international conference on Parallel architectures …, 2013
242013
A graph-based program representation for analyzing hardware specialization approaches
T Nowatzki, V Govindaraju, K Sankaralingam
IEEE Computer Architecture Letters 14 (2), 94-98, 2015
122015
Breaking simd shackles: Liberating accelerators by exposing flexible microarchitectural mechanisms
V Govindaraju, T Nowatzki, K Sankaralingam
Proceedings of the 22nd International Conference on Parallel Architectures …, 2013
82013
Energy Efficient Computing through Compiler Assisted Dynamic Specialization
V Govindaraju
The University of Wisconsin-Madison, 2014
42014
Big data processing: Scalability with extreme single-node performance
V Govindaraju, S Idicula, S Agrawal, V Vardarajan, A Raghavan, J Wen, ...
2017 IEEE International Congress on Big Data (BigData Congress), 129-136, 2017
32017
Prototyping the DySER specialization architecture with OpenSPARC
J Benson, R Cofell, C Frericks, V Govindaraju, CH Ho, Z Marzec, ...
2012 IEEE Hot Chips 24 Symposium (HCS), 1-3, 2012
22012
Mechanisms for Parallelism Specialization for the DySER Architecture
V Govindaraju, CH Ho, T Nowatzki, K Sankaralingam
UW-Madison, Tech. Rep. TR-1773, 2012
22012
Hybrid instrumentation framework for multicore low power processors
S Idicula, K Kashyap, A Raghavan, E Vlachos, V Govindaraju
US Patent 10,503,626, 2019
12019
Studying hybrid von-neumann/dataflow execution models
T Nowatzki, V Govindaraju, K Sankaralingam
12015
Design and evaluation of dynamically specialized datapaths with the dyser architecture
V Govindaraju, CH Ho, K Sankaralingam
University of Wisconsin-Madison Department of Computer Sciences, 2010
12010
Hybrid instrumentation framework for multicore low power processors
S Idicula, K Kashyap, A Raghavan, E Vlachos, V Govindaraju
US Patent App. 16/670,681, 2020
2020
Tail-based top-n query evaluation
G Zhang, V Govindaraju, S Idicula
US Patent App. 16/446,636, 2019
2019
Tail-based top-N query evaluation
G Zhang, V Govindaraju, S Idicula
US Patent 10,394,811, 2019
2019
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