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Champac V
Champac V
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Year
Current vs. logic testing of gate oxide short, floating gate and bridging failures in CMOS
R Rodríguez-Montañés, JA Segura, VH Champac, J Figueras, JA Rubio
1991, Proceedings. International Test Conference, 510, 1991
1291991
Electrical model of the floating gate defect in CMOS ICs: implications on I/sub DDQ/testing
VH Champac, A Rubio, J Figueras
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994
1281994
Fault Modelling of Gate Oxide Short, Floating Gate and Bridging Failuers in CMOS Circuit
VH Champac
Proc. of European Test Conf., 143-148, 1991
581991
Quiescent current analysis and experimentation of defective CMOS circuits
JA Segura, VH Champac, R Rodriguez-Montanes, J Figueras, JA Rubio
Journal of Electronic Testing 3, 337-348, 1992
541992
Noise-tolerance improvement in dynamic CMOS logic circuits
F Mendoza-Hernandez, M Linares-Aranda, V Champac
IEE Proceedings-Circuits, Devices and Systems 153 (6), 565-573, 2006
482006
Adaptive error-prediction flip-flop for performance failure prediction with aging sensors
CV Martins, J Semião, JC Vazquez, V Champac, M Santos, IC Teixeira, ...
29th VLSI Test Symposium, 203-208, 2011
452011
Predictive error detection by on-line aging monitoring
JC Vazquez, V Champac, AM Ziesemer, R Reis, J Semião, IC Teixeira, ...
2010 IEEE 16th International On-Line Testing Symposium, 9-14, 2010
452010
Built-in aging monitoring for safety-critical applications
JC Vazquez, V Champac, AM Ziesemer, R Reis, IC Teixeira, MB Santos, ...
2009 15th IEEE International On-Line Testing Symposium, 9-14, 2009
452009
Low-sensitivity to process variations aging sensor for automotive safety-critical applications
JC Vazquez, V Champac, AM Ziesemer, R Reis, IC Teixeira, MB Santos, ...
2010 28th VLSI Test Symposium (VTS), 238-243, 2010
432010
Detectability conditions for interconnection open defects
VH Champac, A Zenteno
Proceedings 18th IEEE VLSI Test Symposium, 305-311, 2000
382000
Programmable aging sensor for automotive safety-critical applications
JC Vazquez, V Champac, IC Teixeira, MB Santos, JP Teixeira
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
332010
Test of interconnection opens considering coupling signals
R Gomez, A Giron, V Champac
20th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2005
272005
IDDQ testing of opens in CMOS SRAMs
VH Champac, J Castillejos, J Figueras
Journal of Electronic Testing 15, 53-62, 1999
271999
Timing performance of nanometer digital circuits under process variations
V Champac, JG Gervacio
Springer International Publishing, 2018
262018
Aging-aware power or frequency tuning with predictive fault detection
J Pachito, CV Martins, B Jacinto, J Semiao, JC Vazquez, V Champac, ...
IEEE Design & Test of Computers 29 (5), 27-36, 2012
252012
Stuck-open fault leakage and testing in nanometer technologies
J Vazquez, V Champac, C Hawkins, J Segura
2009 27th IEEE VLSI Test Symposium, 315-320, 2009
212009
Testability of floating gate defects in sequential circuits
VH Champac, J Figueras
Proceedings 13th IEEE VLSI Test Symposium, 202-207, 1995
201995
Testing of stuck-open faults in nanometer technologies
V Champac, JV Hernandez, S Barcelo, R Gomez, C Hawkins, J Segura
IEEE Design & Test of Computers 29 (4), 80-91, 2012
182012
Testing of resistive opens in CMOS latches and flip-flops
VH Champac, A Zenteno, JL Garcia
European Test Symposium (ETS'05), 34-40, 2005
182005
Effectiveness of a hardware-based approach to detect resistive-open defects in SRAM cells under process variations
AF Gomez, F Lavratti, G Medeiros, M Sartori, LB Poehls, V Champac, ...
Microelectronics Reliability 67, 150-158, 2016
162016
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