Valeriy Sukharev

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Ehrenfried ZschechProfessor for Nanoanalysis, Technische Universität DresdenVerified email at ikts.fraunhofer.de
Sheldon X.-D. TanUniversity of California at RiversideVerified email at ece.ucr.edu
Xin HuangUC, RiversideVerified email at ucr.edu
Farid N. NajmProfessor of Electrical & Computer Engineering, University of TorontoVerified email at utoronto.ca
Taeyoung KimIntel CorporationVerified email at intel.com
Sandeep ChatterjeePhD Candidate, University of TorontoVerified email at mail.utoronto.ca
Robert HoekstraSandia National LaboratoriesVerified email at sandia.gov
Mark J. KushnerUniversity of MichiganVerified email at umich.edu
Krishna SaraswatProfessor of Electrical Engineering, Stanford UniversityVerified email at stanford.edu
Helmut PuchnerCypress SemiconductorVerified email at cypress.com
James P. McVittieStanford UniversityVerified email at stanford.edu
Richard E CavicchiNational Institute of Standards and Technology (NIST)Verified email at nist.gov
Chao-Kun HuIBMVerified email at us.ibm.com
Bowen ZhengPony.AIVerified email at ucr.edu
David BlaauwProfessor of Electrical Engineering and Computer Science, University of MichiganVerified email at umich.edu
Dennis SylvesterProfessor of Electrical Engineering and Computer Science, University of MichiganVerified email at umich.edu
Vivek JoshiGLOBALFOUNDRIES, University of MichiganVerified email at umich.edu
Kanak AgarwalArmVerified email at arm.com
Banafsheh BarabadiPostdoctoral Associate, MITVerified email at mit.edu
Yogendra JoshiProfessor of Mechanical Engineering, Georgia Institute of TechnologyVerified email at me.gatech.edu

Valeriy Sukharev

Technical Lead, Siemens EDA

Verified email at mentor.com - Homepage

materials science solid state physics process and reliability simulation


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Полупроводниковые сенсоры в физико-химических исследованиях ИА Мясников, ВЯ Сухарев, ЛЮ Куприянов, СА Завьялов Наука, 1991	223	1991
Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage V Sukharev, W Uesato, JR Hu, W Hsia, L Qian US Patent 6,114,259, 2000	152	2000
Microtrenching resulting from specular reflection during chlorine etching of silicon RJ Hoekstra, MJ Kushner, V Sukharev, P Schoenborn Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 1998	125	1998
Physics-based electromigration assessment for power grid networks X Huang, T Yu, V Sukharev, SXD Tan Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014	122	2014
Composite semiconductor gate dielectrics S Aronowitz, D Chan, J Kimball, D Lee, J Haywood, V Sukharev US Patent 6,087,229, 2000	116	2000
Poluprovodnikovye sensory v fiziko-khimicheskikh issledovaniyakh IA Myasnikov, VY Sukharev, LY Kupriyanov, SA Zav'yalov M.: Nauka, 327, 1991	104*	1991
Semiconductor sensors in physico-chemical studies LY Kupriyanov Elsevier Science, 1996	94*	1996
A model for electromigration-induced degradation mechanisms in dual-inlaid copper interconnects: Effect of microstructure V Sukharev, E Zschech, WD Nix Journal of Applied Physics 102 (5), 053505, 2007	93	2007
Concerning the role of oxygen in photocatalytic decomposition of salicylic acid in water V Sukharev, R Kershaw Journal of Photochemistry and Photobiology A: Chemistry 98 (3), 165-169, 1996	92	1996
A model for electromigration-induced degradation mechanisms in dual-inlaid copper interconnects: Effect of interface bonding strength V Sukharev, E Zschech Journal of Applied Physics 96 (11), 6337-6343, 2004	87	2004
Multistep tungsten CVD process with amorphization step VY Sukharev, DJ Heine US Patent 5,804,249, 1998	82	1998
Apparatus and method of manufacture for integrated circuit and CMOS device including epitaxially grown dielectric on silicon carbide MR Mirabedini, V Sukharev US Patent 7,138,292, 2006	78	2006
Power grid electromigration checking using physics-based models S Chatterjee, V Sukharev, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017	69	2017
Diffusion barrier for polysilicon gate electrode of MOS device in integrated circuit structure, and method of making same S Aronowitz, V Sukharev, J Owyang, J Haywood US Patent 5,837,598, 1998	69	1998
Method of forming variable thickness gate dielectrics S Aronowitz, D Chan, J Kimball, D Lee, J Haywood, V Sukharev US Patent 6,033,998, 2000	67	2000
Physics-based electromigration models and full-chip assessment for power grid networks X Huang, A Kteyan, SXD Tan, V Sukharev IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016	64	2016
Beyond Black’s equation: Full-chip EM/SM assessment in 3D IC stack V Sukharev Microelectronic Engineering 120, 99-105, 2014	64	2014
Method and apparatus for forming dielectric films VK Sukharev US Patent 5,710,079, 1998	55	1998
Microstructure effect on EM-induced degradations in dual inlaid copper interconnects V Sukharev, A Kteyan, E Zschech, WD Nix IEEE Transactions on Device and Materials Reliability 9 (1), 87-97, 2009	52	2009
Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same S Aronowitz, V Sukharev, V Zubkov US Patent 6,303,047, 2001	52	2001

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