| Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors M Cintra, JF Martínez, J Torrellas International Symposium on Computer Architecture (ISCA), 13-24, 2000 | 283 | 2000 |
| Generating Code for Holistic Query Evaluation K Krikellas, SD Viglas, M Cintra International Conference on Data Engineering (ICDE), 613-624, 2010 | 199 | 2010 |
| Rewind: Recovery write-ahead system for in-memory non-volatile data-structures A Chatzistergiou, M Cintra, SD Viglas Proceedings of the VLDB Endowment (PVLDB) 8 (5), 497-508, 2015 | 177 | 2015 |
| Toward Efficient and Robust Software Speculative Parallelization on Multiprocessors M Cintra, DR Llanos International Symposium on Principles and Practice of Parallel Programming …, 2003 | 167 | 2003 |
| ATOM: Atomic durability in non-volatile memory through hardware logging A Joshi, V Nagarajan, S Viglas, M Cintra International Symposium on High Performance Computer Architecture (HPCA …, 2017 | 141 | 2017 |
| Efficient persist barriers for multicores A Joshi, V Nagarajan, M Cintra, S Viglas International Symposium on Microarchitecture (MICRO), 660-671, 2015 | 141 | 2015 |
| Eliminating Squashes Through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors M Cintra, J Torrellas International Symposium on High-Performance Computer Architecture (HPCA), 43-54, 2002 | 110 | 2002 |
| Design Space Exploration of a Software Speculative Parallelization Scheme M Cintra, DR Llanos IEEE Transactions on Parallel and Distributed Systems (TPDS) 16 (6), 562-576, 2005 | 98 | 2005 |
| Using Predictive Modeling for Cross-Program Design Space Exploration in Multicore Systems S Khan, P Xekalakis, J Cavazos, M Cintra International Conference on Parallel Architecture and Compilation Techniques …, 2007 | 94 | 2007 |
| An OS-Based Alternative to Full Hardware Coherence on Tiled CMPs C Fensch, M Cintra International Symposium on High Performance Computer Architecture (HPCA …, 2008 | 85 | 2008 |
| DHTM: Durable hardware transactional memory A Joshi, V Nagarajan, M Cintra, S Viglas International Symposium on Computer Architecture (ISCA), 452-465, 2018 | 70 | 2018 |
| Phase-Based Application-Driven Hierarchical Power Management on the Single-chip Cloud Computer N Ioannou, M Kauschke, M Gries, M Cintra International Conference on Parallel Architectures and Compilation …, 2011 | 66 | 2011 |
| Stream Chaining: Exploiting Multiple Levels of Correlation in Data Prefetching P Diaz, M Cintra International Symposium on Computer Architecture (ISCA), 81-92, 2009 | 61 | 2009 |
| A Machine Learning-Based Approach for Thread Mapping on Transactional Memory Applications M Castro, LFW Góes, CP Ribeiro, M Cole, M Cintra, JF Méhaut International Conference on High Performance Computing (HiPC), 1-10, 2011 | 60 | 2011 |
| A Machine Learning-Based Approach for Thread Mapping on Transactional Memory Applications L Goes, CP Ribeiro, M Cintra, JF Mehaut International Conference on High Performance Computing (HiPC), 2011 | 60* | 2011 |
| Combining Thread Level Speculation, Helper Threads and Runahead Execution P Xekalakis, N Ioannou, M Cintra International Conference on Supercomputing (ICS), 410-420, 2009 | 54 | 2009 |
| Software-Based Cache Coherence with Hardware-Assisted Selective Self Invalidations Using Bloom Filters T Ashby, P Diaz, M Cintra IEEE Transactions on Computers (TC) 60 (4), 472-483, 2011 | 53 | 2011 |
| A compiler Cost Model for Speculative Parallelization J Dou, M Cintra ACM Transactions on Architecture and Code Optimization (TACO) 4 (2), 12, 2007 | 48 | 2007 |
| Compiler Estimation of Load Imbalance Overhead in Speculative Parallelization J Dou, M Cintra International Conference on Parallel Architectures and Compilation …, 2004 | 37 | 2004 |
| DRIFT: Decoupled compileR-based Instruction-level Fault-Tolerance⋆ K Mitropoulou, V Porpodas, M Cintra International Workshop on Languages and Compilers for Parallel Computing (LCPC), 2013 | 30 | 2013 |
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