Jan Reineke

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Daniel GrundSaarland UniversityVerified email at cs.uni-saarland.de
Reinhard WilhelmComputer Science, Saarland University, Saarland Informatics Campus (SIC)Verified email at cs.uni-saarland.de
Sebastian AltmeyerUniversity of AugsburgVerified email at uva.nl
claire maizaGrenobleINP / VerimagVerified email at univ-grenoble-alpes.fr
Sebastian HahnAbsInt Angewandte Informatik GmbHVerified email at cs.uni-saarland.de
Boris KöpfMicrosoft ResearchVerified email at microsoft.com
Andreas AbelSaarland University, Saarland Informatics CampusVerified email at cs.uni-saarland.de
Edward A. LEEProfessor of Electrical Engineering and Computer Sciences, University of California at BerkeleyVerified email at berkeley.edu
Rob DavisReader, Real-Time Systems Research Group (RTSRG), University of York, UK.Verified email at york.ac.uk
Wang YiProfessor of Embedded Systems, Uppsala UniversityVerified email at it.uu.se
Hiren PatelUniversity of WaterlooVerified email at uwaterloo.ca
Marco GuarnieriIMDEA Software InstituteVerified email at imdea.org
Bernd BeckerProfessor of Computer Science, University of FreiburgVerified email at informatik.uni-freiburg.de
Ilia PolianUniversity of StuttgartVerified email at polian.de
Goran DoychevIMDEA Software InstituteVerified email at imdea.org
Stavros TripakisAssociate Professor, Northeastern UniversityVerified email at northeastern.edu
Johannes DoerfertArgonne National LaboratoryVerified email at anl.gov
David BromanKTH Royal Institute of TechnologyVerified email at kth.se
Jose F. MoralesResearcher at IMDEA Software InstituteVerified email at imdea.org
Jian-Jia ChenProfessor of Computer Science, TU Dortmund University, GermanyVerified email at cs.uni-dortmund.de

Jan Reineke

Professor of Computer Science, Saarland University, Saarland Informatics Campus

Verified email at cs.uni-saarland.de - Homepage

Static Analysis WCET Analysis Real-time Systems Abstract Interpretation


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Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems R Wilhelm, D Grund, J Reineke, M Schlickling, M Pister, C Ferdinand IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009	298	2009
Timing predictability of cache replacement policies J Reineke, D Grund, C Berg, R Wilhelm Real-Time Systems 37 (2), 99-122, 2007	264	2007
A definition and classification of timing anomalies J Reineke, B Wachter, S Thesing, R Wilhelm, I Polian, J Eisinger, ... 6th International Workshop on Worst-Case Execution Time Analysis (WCET), 2006	247	2006
CacheAudit: A Tool for the Static Analysis of Cache Side Channels G Doychev, B Köpf, L Mauborgne, J Reineke ACM Transactions on Information and System Security (TISSEC), 2015	234	2015
PRET DRAM controller: Bank privatization for predictability and temporal isolation J Reineke, I Liu, HD Patel, S Kim, EA Lee IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and …, 2011	220	2011
Predictability considerations in the design of multi-core embedded systems C Cullmann, C Ferdinand, G Gebhard, D Grund, C Maiza, J Reineke, ... Embedded Real Time Software and Systems (ERTSS), 36-42, 2010	133	2010
Building timing predictable embedded systems P Axer, R Ernst, H Falk, A Girault, D Grund, N Guan, B Jonsson, ... ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-37, 2014	123	2014
A PRET Microarchitecture Implementation with Repeatable Timing and Competitive Performance I Liu, J Reineke, D Broman, M Zimmer, EA Lee 30th International IEEE Conference on Computer Design (ICCD), 2012	114	2012
Towards Compositionality in Execution Time Analysis–Definition and Challenges S Hahn, J Reineke, R Wilhelm 6th International Workshop on Compositional Theory and Technology for Real …, 2013	97	2013
A PRET architecture supporting concurrent programs with composable timing properties I Liu, J Reineke, EA Lee 44th Asilomar Conference on Signals, Systems and Computers, 2111-2115, 2010	82	2010
Temporal isolation on multiprocessing architectures D Bui, E Lee, I Liu, H Patel, J Reineke 48th Annual ACM/EDAC/IEEE Design Automation Conference (DAC), 274-279, 2011	79	2011
Resilience Analysis: Tightening the CRPD bound for set-associative caches S Altmeyer, C Maiza, J Reineke ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for …, 2010	78	2010
Caches in WCET analysis J Reineke Universität des Saarlandes, Saarbrücken, PhD Thesis, 2008	76*	2008
Impact of Resource Sharing on Performance and Performance Prediction: A Survey A Abel, F Benz, J Doerfert, B Dörr, S Hahn, F Haupenthal, M Jacobs, ... 24th International Conference on Concurrency Theory (CONCUR), 2013	70	2013
A generic and compositional framework for multicore response time analysis S Altmeyer, RI Davis, L Indrusiak, C Maiza, V Nelis, J Reineke 23rd International Conference on Real-Time Networks and Systems (RTNS), 129-138, 2015	66	2015
Relative competitive analysis of cache replacement policies J Reineke, D Grund ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for …, 2008	54	2008
Precise and efficient FIFO-replacement analysis based on static phase detection D Grund, J Reineke 22nd Euromicro Conference on Real-Time Systems (ECRTS), 155-164, 2010	53	2010
Embedded Systems: Many Cores–Many Problems R Wilhelm, J Reineke 7th IEEE International Symposium on Industrial Embedded Systems (SIES), 2012	52	2012
CAMA: A predictable cache-aware memory allocator J Herter, P Backes, F Haupenthal, J Reineke 23rd Euromicro Conference on Real-Time Systems (ECRTS), 23-32, 2011	52	2011
Static timing analysis for hard real-time systems R Wilhelm, S Altmeyer, C Burguière, D Grund, J Herter, J Reineke, ... 11th International Conference on Verification, Model Checking, and Abstract …, 2010	51	2010

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