Christian Haubelt
Christian Haubelt
Professor of Embedded Systems, University of Rostock, Germany
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Zitiert von
Zitiert von
Electronic system-level synthesis methodologies
A Gerstlauer, C Haubelt, AD Pimentel, TP Stefanov, DD Gajski, J Teich
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications
J Keinert, T Schlichter, J Falk, J Gladigau, C Haubelt, J Teich, M Meredith
ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1), 1, 2009
Digitale Hardware/Software-Systeme: Synthese und Optimierung
J Teich, C Haubelt
Springer-Verlag, 2007
A SystemC-based design methodology for digital signal processing systems
C Haubelt, J Falk, J Keinert, T Schlichter, M Streubühr, A Deyhle, A Hadert, ...
EURASIP Journal on Embedded Systems 2007, 1-22, 2007
Efficient hardware checkpointing: concepts, overhead analysis, and implementation
D Koch, C Haubelt, J Teich
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field …, 2007
Reliability-aware system synthesis
M Glaß, M Lukasiewycz, T Streichert, C Haubelt, J Teich
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
Efficient symbolic multi-objective design space exploration
M Lukasiewycz, M Glaß, C Haubelt, J Teich
2008 Asia and South Pacific Design Automation Conference, 691-696, 2008
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
C Haubelt, T Schlichter, J Keinert, M Meredith
Proceedings of the 45th annual Design Automation Conference, 580-585, 2008
Combined system synthesis and communication architecture exploration for MPSoCs
M Lukasiewycz, M Streubühr, M Glaß, C Haubelt, J Teich
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE'09 …, 2009
Efficient representation and simulation of model-based designs in SystemC
J Falk, C Haubelt, J Teich
Proc. of FDL 6, 2006
Logic chip, logic system and method for designing a logic chip
D Koch, T Streichert, C Haubelt, J Teich
US Patent 8,018,249, 2011
Sat-decoding in evolutionary algorithms for discrete constrained optimization problems
M Lukasiewycz, M Glaß, C Haubelt, J Teich
2007 IEEE Congress on Evolutionary Computation, 935-942, 2007
System design for flexibility
C Haubelt, J Teich, K Richter, R Ernst
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
ESL power and performance estimation for heterogeneous MPSOCS using SystemC
M Streubühr, R Rosales, R Hasholzner, C Haubelt, J Teich
FDL 2011 Proceedings, 1-8, 2011
A generalized static data flow clustering algorithm for MPSoC scheduling of multimedia applications
J Falk, J Keinert, C Haubelt, J Teich, SS Bhattacharyya
Proceedings of the 8th ACM international conference on Embedded software …, 2008
Accelerating design space exploration using Pareto-front arithmetics
C Haubelt, J Teich
Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003
Assertion-Based Verification of Transaction Level Models.
B Niemann, C Haubelt
MBMV, 232-236, 2006
Efficient reconfigurable on-chip buses for FPGAs
D Koch, C Haubelt, J Teich
2008 16th International Symposium on Field-Programmable Custom Computing …, 2008
Formalizing TLM with communicating state machines
B Niemann, C Haubelt, MU Oyanguren, J Teich
Advances in Design and Specification Languages for Embedded Systems …, 2007
Modeling and analysis of windowed synchronous algorithms
J Keinert, C Haubelt, J Teich
2006 IEEE International Conference on Acoustics Speech and Signal Processing …, 2006
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