| A 65 nm 32 b subthreshold processor with 9T multi-Vt SRAM and adaptive supply voltage control S Lutkemeier, T Jungeblut, HKO Berge, S Aunet, M Porrmann, U Ruckert IEEE Journal of Solid-State Circuits 48 (1), 8-19, 2012 | 111 | 2012 |
| High-speed serial AER on FPGA HKO Berge, P Hafliger 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 857-860, 2007 | 43 | 2007 |
| SIPHRA 16-channel silicon photomultiplier readout ASIC D Meier, J Ackermann, A Olsen, H Kristian, H Berge, A Hasanbegovic, ... Proc. AMICSA & DSP 2016, 2016 | 38 | 2016 |
| Benefits of decomposing wide CMOS transistors into minimum-size gates HKO Berge, S Aunet 2009 NORCHIP, 1-4, 2009 | 17 | 2009 |
| Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach HKO Berge, M Blesken, S Aunet, DU Rückert 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 11 | 2010 |
| Muller C-elements based on minority-3 functions for ultra low voltage supplies HKO Berge, A Hasanbegović, S Aunet 14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011 | 10 | 2011 |
| Development of an ASIC for charged particle counting with silicon radiation detectors D Meier, S Azman, JE Ramstad, A Hasanbegovic, J Talebi, MA Altan, ... 2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS …, 2013 | 9 | 2013 |
| Development of an ASIC for the Readout of CZT/CdTe Radiation Detectors in Space D Meier, JE Ramstad, A Hasanbegovic, S Azman, J Talebi, MA Altan, ... 2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS …, 2013 | 9 | 2013 |
| Statistical simulations for exploring defect tolerance and power consumption for 4 subthreshold 1-bit addition circuits S Aunet, HK Otnes Berge Computational and Ambient Intelligence: 9th International Work-Conference on …, 2007 | 9 | 2007 |
| Preliminary validation results of an ASIC for the readout and control of near-infrared large array detectors P Påhlsson, D Meier, HKO Berge, P Øya, D Steenari, A Olsen, ... Infrared Technology and Applications XLI 9451, 672-686, 2015 | 8 | 2015 |
| Multi-objective optimization of minority-3 functions for ultra-low voltage supplies HKO Berge, S Aunet Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 2313-2316, 2011 | 7 | 2011 |
| Front-end readout ASIC for charged particle counting with the RADEM instrument on the ESA JUICE mission TA Stein, P Påhlsson, D Meier, A Hasanbegovic, HKO Berge, MA Altan, ... Space Telescopes and Instrumentation 2016: Ultraviolet to Gamma Ray 9905 …, 2016 | 6 | 2016 |
| Development of an ASIC for the readout and control of near-infrared large array detectors D Meier, HKO Berge, A Hasanbegovic, MA Altan, B Najafiuchevler, ... High Energy, Optical, and Infrared Detectors for Astronomy VI 9154, 656-664, 2014 | 6 | 2014 |
| Exploiting gate leakage in deep-submicrometer CMOS for input offset adaptation P Hafliger, HKO Berge IEEE Transactions on Circuits and Systems II: Express Briefs 54 (2), 127-130, 2007 | 6 | 2007 |
| A gate leakage feedback element in an adaptive amplifier application HKO Berge, P HÄfliger IEEE Transactions on Circuits and Systems II: Express Briefs 55 (2), 101-105, 2008 | 5 | 2008 |
| NIRCA ASIC for the readout of focal plane arrays P Påhlsson, D Steenari, P Øya, HKO Berge, D Meier, A Olsen, ... Infrared Technology and Applications XLII 9819, 646-663, 2016 | 2 | 2016 |
| Yield-oriented energy and performance model for subthreshold circuits with Vth variations HKO Berge, S Aunet 2013 IEEE 16th International Symposium on Design and Diagnostics of …, 2013 | 1 | 2013 |
| An AER Analog Silicon Cochlea Model using Pseudo Floating Gate Transconductors HKO Berge | 1 | 2005 |
| Improvements towards Optimal Design of Reliable Subthreshold Digital CMOS with applications in Logic and Memory HKO Berge | | 2015 |
| Statistical Simulations on Perceptron-Based Adders S Aunet, HKO Berge Encyclopedia of Artificial Intelligence, 1474-1481, 2009 | | 2009 |
Philipp HäfligerUniversity of OsloBestätigte E-Mail-Adresse bei ifi.uio.no
