Follow
Deepankar Duggal
Deepankar Duggal
Verified email at umich.edu
Title
Cited by
Cited by
Year
Exploring DRAM organizations for energy-efficient and resilient exascale memories
B Giridhar, M Cieslak, D Duggal, R Dreslinski, HM Chen, R Patti, B Hold, ...
Proceedings of the International Conference on High Performance Computing …, 2013
842013
System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction
MM Al-Otoom, C Blasco, D Duggal, KN Kothari, RF Russo
US Patent 10,838,729, 2020
22020
History file for previous register mapping storage and last reference indication
D Duggal, C Blasco, MM Al-Otoom, RF Russo
US Patent 11,200,062, 2021
2021
Zero cycle load bypass
D Duggal, KN Kothari, C Blasco, MM Al-Otoom
US Patent App. 16/705,023, 2021
2021
Coprocessor with distributed register
A Kesiraju, AJ Beaumont-Smith, D Duggal, RA Chachick
US Patent 10,846,091, 2020
2020
Speculative writes to special-purpose register
CM Tsay, C Blasco, D Duggal, RF Russo
US Patent 10,838,723, 2020
2020
Branch resolve pointer optimization
KN Kothari, M Agarwal, A Kesiraju, D Duggal, SM Reynolds
US Patent 10,628,164, 2020
2020
Program counter capturing
C Blasco, D Duggal, RF Russo
US Patent 9,952,863, 2018
2018
The system can't perform the operation now. Try again later.
Articles 1–8