David Dill
David Dill
Professor, Emeritus, of Computer Science, Stanford University
Bestätigte E-Mail-Adresse bei stanford.edu
Titel
Zitiert von
Zitiert von
Jahr
A theory of timed automata
R Alur, DL Dill
Theoretical computer science 126 (2), 183-235, 1994
93241994
Symbolic model checking: 1020 states and beyond
JR Burch, EM Clarke, KL McMillan, DL Dill, LJ Hwang
Information and computation 98 (2), 142-170, 1992
43061992
Automata for modeling real-time systems
R Alur, D Dill
International colloquium on automata, languages, and programming, 322-335, 1990
15671990
EXE: Automatically generating inputs of death
C Cadar, V Ganesh, PM Pawlowski, DL Dill, DR Engler
ACM Transactions on Information and System Security (TISSEC) 12 (2), 1-38, 2008
14512008
Model-checking for real-time systems
R Alur, C Courcoubetis, D Dill
[1990] Proceedings. Fifth Annual IEEE Symposium on Logic in Computer Science …, 1990
13651990
Model-checking in dense real-time
R Alur, C Courcoubetis, D Dill
Information and computation 104 (1), 2-34, 1993
13191993
Reluplex: An efficient SMT solver for verifying deep neural networks
G Katz, C Barrett, DL Dill, K Julian, MJ Kochenderfer
International Conference on Computer Aided Verification, 97-117, 2017
10632017
Timing assumptions and verification of finite-state concurrent systems
DL Dill
International Conference on Computer Aided Verification, 197-212, 1989
10591989
Symbolic model checking for sequential circuit verification
JR Burch, EM Clarke, DE Long, KL McMillan, DL Dill
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994
8441994
Trace theory for automatic hierarchical verification of speed-independent circuits
DL Dill
MIT press, 1989
8021989
Automatic verification of pipelined microprocessor control
JR Burch, DL Dill
International Conference on Computer Aided Verification, 68-80, 1994
7781994
A decision procedure for bit-vectors and arrays
V Ganesh, DL Dill
International conference on computer aided verification, 519-531, 2007
7682007
Better verification through symmetry
CN Ip, DL Dill
Formal methods in system design 9 (1), 41-75, 1996
7541996
Sequential circuit verification using symbolic model checking
JR Burch, EM Clarke, KL McMillan, DL Dill
27th ACM/IEEE Design Automation Conference, 46-51, 1990
6901990
Protocol verification as a hardware design aid.
DL Dill, AJ Drexler, AJ Hu, CH Yang
ICCD 92, 522-525, 1992
6271992
CMC: A pragmatic approach to model checking real code
M Musuvathi, DYW Park, A Chou, DR Engler, DL Dill
ACM SIGOPS Operating Systems Review 36 (SI), 75-88, 2002
5262002
The Mur ϕ verification system
DL Dill
International Conference on Computer Aided Verification, 390-393, 1996
4711996
Parallelizing the Murϕ verifier
U Stern, DL Dill
International Conference on Computer Aided Verification, 256-267, 1997
370*1997
Experience with predicate abstraction
S Das, DL Dill, S Park
International Conference on Computer Aided Verification, 160-171, 1999
3401999
Automated identification of stratifying signatures in cellular subpopulations
RV Bruggner, B Bodenmiller, DL Dill, RJ Tibshirani, GP Nolan
Proceedings of the National Academy of Sciences 111 (26), E2770-E2777, 2014
3392014
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