Saketh Ram Mamidala
Saketh Ram Mamidala
Postdoctoral Researcher, IBM-Research
Verified email at - Homepage
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Tuning oxygen vacancies and resistive switching properties in ultra-thin HfO2 RRAM via TiN bottom electrode and interface engineering
Z Yong, KM Persson, MS Ram, G D'Acunto, Y Liu, S Benter, J Pan, Z Li, ...
Applied Surface Science 551, 149386, 2021
Dopingless PNPN tunnel FET with improved performance: design and analysis
MS Ram, DB Abdi
Superlattices and Microstructures 82, 430-437, 2015
High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
MS Ram, KM Persson, A Irish, A Jönsson, R Timm, LE Wernersson
Nature Electronics 4 (12), 914-920, 2021
Submicrometer top-gate self-aligned a-IGZO TFTs by substrate conformal imprint lithography
MS Ram, L De Kort, J De Riet, R Verbeek, T Bel, G Gelinck, ...
IEEE Transactions on Electron Devices 66 (4), 1778-1782, 2019
Single grain boundary tunnel field effect transistors on recrystallized polycrystalline silicon: Proposal and investigation
MS Ram, DB Abdi
IEEE Electron Device Letters 35 (10), 989-991, 2014
Cross‐Point Arrays with Low‐Power ITO‐HfO2 Resistive Memory Cells Integrated on Vertical III‐V Nanowires
KM Persson, MS Ram, OP Kilpi, M Borg, LE Wernersson
Advanced Electronic Materials 6 (6), 2000154, 2020
Low-power resistive memory integrated on III–V vertical nanowire MOSFETs on silicon
MS Ram, KM Persson, M Borg, LE Wernersson
IEEE Electron Device Letters 41 (9), 1432-1435, 2020
Single grain boundary dopingless PNPN tunnel FET on recrystallized polysilicon: Proposal and theoretical analysis
MS Ram, DB Abdi
IEEE Journal of the Electron Devices Society 3 (3), 291-296, 2015
Ultra-Scaled AlOx Diffusion Barriers for Multibit HfOx RRAM Operation
KM Persson, MS Ram, LE Wernersson
IEEE Journal of the Electron Devices Society 9, 564-569, 2021
Increased breakdown voltage in vertical heterostructure III-V nanowire MOSFETs with a field plate
OP Kilpi, S Andrić, J Svensson, MS Ram, E Lind, LE Wernersson
IEEE Electron Device Letters 42 (11), 1596-1598, 2021
Dopingless tunnel FET with a hetero-material gate: Design and analysis
MS Ram, DB Abdi
2014 IEEE 2nd International Conference on Emerging Electronics (ICEE), 1-4, 2014
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
MS Ram, J Svensson, S Skog, S Johannesson, LE Wernersson
IEEE Electron Device Letters 43 (12), 2033-2036, 2022
Performance investigation of single grain boundary junctionless field effect transistor
MS Ram, DB Abdi
IEEE Journal of the Electron Devices Society 4 (6), 480-484, 2016
Investigation of reverse filament formation in ITO/HfO2-based RRAM
KM Persson, MS Ram, M Borg, LE Wernersson
2019 Device Research Conference (DRC), 91-92, 2019
Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors
M Saketh Ram, J Svensson, LE Wernersson
ACS Applied Materials & Interfaces 15 (15), 19085-19091, 2023
A 4F2 Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon
MS Ram, KM Persson, LE Wernersson
2022 IEEE Silicon Nanoelectronics Workshop (SNW), 1-2, 2022
Performance, analysis, and modeling of III-V vertical nanowire MOSFETs on Si at higher voltages
S Andrić, OP Kilpi, MS Ram, J Svensson, E Lind, LE Wernersson
IEEE Transactions on Electron Devices 69 (6), 3055-3060, 2022
Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
G Rangasamy, MS Ram, LO Fhager, LE Wernersson
IEEE Electron Device Letters, 2023
Optimization of Platinum dioxide properties by plasma oxidation of sputtered PtOx
N Basu, NS Sterin, SR Mamidala, A Shenoy, N Bhat
Materialia 8, 100477, 2019
Multi-Level, Low-Voltage Programming of Ferroelectric HfO2/ZrO2 Nanolaminates Integrated in the Back-End-Of-Line
R Hamming-Green, MS Ram, DF Falcone, B Noheda, BJ Offrein, ...
2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2024
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