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Johann Knechtel
Johann Knechtel
New York University, Abu Dhabi
Verified email at nyu.edu - Homepage
Title
Cited by
Cited by
Year
Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging
S Patnaik, M Ashraf, J Knechtel, O Sinanoglu
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 41-48, 2017
532017
Assembling 2D blocks into 3D chips
J Knechtel, IL Markov, J Lienig
Proceedings of the 2011 international symposium on Physical design, 81-88, 2011
482011
Advancing hardware security using polymorphic and stochastic spin-hall effect devices
S Patnaik, N Rangarajan, J Knechtel, O Sinanoglu, S Rakheja
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 97-102, 2018
462018
Large-scale 3D chips: Challenges and solutions for design automation, testing, and trustworthy integration
J Knechtel, O Sinanoglu, IAM Elfadel, J Lienig, CCN Sze
IPSJ Transactions on System LSI Design Methodology 10, 45-62, 2017
402017
Concerted wire lifting: Enabling secure and cost-effective split manufacturing
S Patnaik, M Ashraf, H Li, J Knechtel, O Sinanoglu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
332021
Rethinking split manufacturing: An information-theoretic approach with secure layout techniques
A Sengupta, S Patnaik, J Knechtel, M Ashraf, S Garg, O Sinanoglu
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 329-326, 2017
322017
Planning Massive Interconnects in 3D Chips
J Knechtel, E Young, J Lienig
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2015
302015
Opening the doors to dynamic camouflaging: Harnessing the power of polymorphic devices
N Rangarajan, S Patnaik, J Knechtel, R Karri, O Sinanoglu, S Rakheja
IEEE Transactions on Emerging Topics in Computing, 2020
272020
Raise your game for split manufacturing: Restoring the true functionality through BEOL
S Patnaik, M Ashraf, J Knechtel, O Sinanoglu
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
272018
Protect your chip design intellectual property: An overview
J Knechtel, S Patnaik, O Sinanoglu
Proceedings of the International Conference on Omni-Layer Intelligent …, 2019
252019
DNA-assisted oligomerization of pore-forming toxin monomers into precisely-controlled protein channels
A Henning-Knechtel, J Knechtel, M Magzoub
Nucleic acids research 45 (21), 12057-12068, 2017
252017
Attacking split manufacturing from a deep learning perspective
H Li, S Patnaik, A Sengupta, H Yang, J Knechtel, B Yu, EFY Young, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
222019
Physical Design for 3D Integrated Circuits
A Todri-Sanial, CS Tan
CRC Press, 2016
222016
UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking
L Alrahis, S Patnaik, J Knechtel, H Saleh, B Mohammad, M Al-Qutayri, ...
IEEE Transactions on Information Forensics and Security 16, 2508-2523, 2021
212021
Towards secure composition of integrated circuits and electronic systems: On the role of EDA
J Knechtel, EB Kavun, F Regazzoni, A Heuser, A Chattopadhyay, ...
DATE, 2020
212020
On mitigation of side-channel attacks in 3D ICs: Decorrelating thermal patterns from power and activity
J Knechtel, O Sinanoglu
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
212017
3D stacked chips
A Elfadel, G Fettweis
Springer, 2016
202016
Hardware security for and beyond CMOS technology: an overview on fundamentals, applications, and challenges
J Knechtel
Proceedings of the 2020 International Symposium on Physical Design, 75-86, 2020
192020
Physical design automation for 3D chip stacks: Challenges and solutions
J Knechtel, J Lienig
Proceedings of the 2016 on International Symposium on Physical Design, 3-10, 2016
182016
Multiobjective optimization of deadspace, a critical resource for 3D-IC integration
J Knechtel, IL Markov, J Lienig, M Thiele
Proceedings of the International Conference on Computer-Aided Design, 705-712, 2012
182012
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