| Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication AJ Walker, MG Johnson, NJ Knall, IG Kouznetsov, CJ Petti US Patent 6,888,750, 2005 | 510 | 2005 |
| Method for fabricating programmable memory array structures incorporating series-connected transistor strings AJ Walker, EH Chen, S Nallamothu, RE Scheuerlein, A Ilkbahar, L Fasoli, ... US Patent 7,005,350, 2006 | 429 | 2006 |
| Dense arrays and charge storage devices, and methods for making same T Lee, V Subramanian, J Cleeves, A Walker, C Petti, I Kouznetzov, ... US Patent App. 09/927,648, 2002 | 406 | 2002 |
| Monolithic three dimensional array of charge storage devices containing a planarized surface TH Lee, V Subramanian, JM Cleeves, AJ Walker, CJ Petti, IG Kouznetzov, ... US Patent 6,881,994, 2005 | 361 | 2005 |
| TFT mask ROM and method for making same AJ Walker, C Petti US Patent 6,841,813, 2005 | 316 | 2005 |
| Inverted staggered thin film transistor with salicided source/drain structures and method of making same MA Vyvoda, SB Herner, CJ Petti, AJ Walker US Patent 6,815,781, 2004 | 288 | 2004 |
| Rewriteable memory cell comprising a diode and a resistance-switching material S Herner, C Petti US Patent App. 11/125,939, 2006 | 287 | 2006 |
| Nonvolatile memory cell comprising a diode and a resistance-switching material SB Herner, T Kumar, CJ Petti US Patent 7,812,404, 2010 | 285 | 2010 |
| Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide CJ Petti, SB Herner US Patent 6,946,719, 2005 | 241 | 2005 |
| Dense arrays and charge storage devices TH Lee, V Subramanian, JM Cleeves, AJ Walker, C Petti, IG Kouznetzov, ... US Patent 7,129,538, 2006 | 205 | 2006 |
| Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same RE Scheuerlein, C Petti, AJ Walker, EH Chen, S Nallamothu, A Ilkbahar, ... US Patent 7,505,321, 2009 | 196 | 2009 |
| Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance T Kumar, SB Herner, RE Scheuerlein, CJ Petti US Patent 7,800,933, 2010 | 146 | 2010 |
| Device with embedded high-bandwidth, high-capacity memory using wafer bonding KN Quader, R Norman, FSK Lee, CJ Petti, SB Herner, SL Chan, ... US Patent 11,670,620, 2023 | 139 | 2023 |
| High density contact to relaxed geometry layers RE Scheuerlein, CJ Petti US Patent 7,474,000, 2009 | 138 | 2009 |
| Rewriteable memory cell comprising a transistor and resistance-switching material in series C Petti US Patent App. 11/143,269, 2006 | 132 | 2006 |
| Rail stack array of charge storage devices and method of making same TH Lee, AJ Walker, CJ Petti, IG Kouznetzov US Patent 6,992,349, 2006 | 119 | 2006 |
| Vertical NAND and method of making thereof using sequential stack etching and landing pad CM Wang, J Alsmeier, H Chien, X Costa, YT Chen, C Petti US Patent 8,884,357, 2014 | 117 | 2014 |
| Method for using a passive element memory array incorporating reversible polarity word line and bit line decoders LG Fasoli, CJ Petti, RE Scheuerlein US Patent 7,463,546, 2008 | 100 | 2008 |
| Selective germanium deposition for pillar devices SB Herner, CJ Petti US Patent 7,745,312, 2010 | 92 | 2010 |
| Method for forming polycrystalline thin film bipolar transistors CJ Petti, SB Herner US Patent 7,855,119, 2010 | 87 | 2010 |
